398 lines
11 KiB
YAML
398 lines
11 KiB
YAML
---
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block/SYSCFG:
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description: System configuration controller
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items:
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- name: MEMRMP
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description: memory remap register
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byte_offset: 0
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fieldset: MEMRMP
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- name: CFGR1
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description: configuration register 1
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byte_offset: 4
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fieldset: CFGR1
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- name: EXTICR
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description: external interrupt configuration register 1
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array:
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len: 4
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stride: 4
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byte_offset: 8
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fieldset: EXTICR
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- name: SCSR
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description: SCSR
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byte_offset: 24
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fieldset: SCSR
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- name: CFGR2
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description: CFGR2
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byte_offset: 28
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fieldset: CFGR2
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- name: SWPR
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description: SRAM2 write protection register
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byte_offset: 32
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access: Write
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fieldset: SWPR
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- name: SKR
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description: SKR
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byte_offset: 36
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access: Write
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fieldset: SKR
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- name: SWPR2
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description: SRAM2 write protection register 2
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byte_offset: 40
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access: Write
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fieldset: SWPR2
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- name: IMR1
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description: CPU1 interrupt mask register 1
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byte_offset: 256
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fieldset: IMR1
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- name: IMR2
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description: CPU1 interrupt mask register 2
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byte_offset: 260
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fieldset: IMR2
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- name: C2IMR1
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description: CPU2 interrupt mask register 1
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byte_offset: 264
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fieldset: C2IMR1
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- name: C2IMR2
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description: CPU2 interrupt mask register 1
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byte_offset: 268
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fieldset: C2IMR2
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- name: SIPCR
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description: secure IP control register
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byte_offset: 272
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fieldset: SIPCR
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fieldset/C2IMR1:
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description: CPU2 interrupt mask register 1
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fields:
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- name: RTCSTAMP
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description: Peripheral RTCSTAMP interrupt mask to CPU2
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bit_offset: 0
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bit_size: 1
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- name: RTCWKUP
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description: Peripheral RTCWKUP interrupt mask to CPU2
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bit_offset: 3
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bit_size: 1
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- name: RTCALARM
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description: Peripheral RTCALARM interrupt mask to CPU2
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bit_offset: 4
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bit_size: 1
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- name: RCC
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description: Peripheral RCC interrupt mask to CPU2
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bit_offset: 5
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bit_size: 1
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- name: FLASH
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description: Peripheral FLASH interrupt mask to CPU2
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bit_offset: 6
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bit_size: 1
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- name: PKA
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description: Peripheral PKA interrupt mask to CPU2
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bit_offset: 8
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bit_size: 1
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- name: RNG
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description: Peripheral RNG interrupt mask to CPU2
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bit_offset: 9
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bit_size: 1
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- name: AES1
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description: Peripheral AES1 interrupt mask to CPU2
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bit_offset: 10
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bit_size: 1
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- name: COMP
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description: Peripheral COMP interrupt mask to CPU2
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bit_offset: 11
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bit_size: 1
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- name: ADC
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description: Peripheral ADC interrupt mask to CPU2
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bit_offset: 12
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bit_size: 1
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fieldset/C2IMR2:
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description: CPU2 interrupt mask register 1
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fields:
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- name: DMA1_CH1_IM
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description: Peripheral DMA1 CH1 interrupt mask to CPU2
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bit_offset: 0
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bit_size: 1
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- name: DMA1_CH2_IM
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description: Peripheral DMA1 CH2 interrupt mask to CPU2
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bit_offset: 1
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bit_size: 1
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- name: DMA1_CH3_IM
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description: Peripheral DMA1 CH3 interrupt mask to CPU2
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bit_offset: 2
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bit_size: 1
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- name: DMA1_CH4_IM
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description: Peripheral DMA1 CH4 interrupt mask to CPU2
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bit_offset: 3
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bit_size: 1
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- name: DMA1_CH5_IM
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description: Peripheral DMA1 CH5 interrupt mask to CPU2
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bit_offset: 4
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bit_size: 1
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- name: DMA1_CH6_IM
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description: Peripheral DMA1 CH6 interrupt mask to CPU2
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bit_offset: 5
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bit_size: 1
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- name: DMA1_CH7_IM
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description: Peripheral DMA1 CH7 interrupt mask to CPU2
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bit_offset: 6
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bit_size: 1
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- name: DMA2_CH1_IM
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description: Peripheral DMA2 CH1 interrupt mask to CPU1
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bit_offset: 8
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bit_size: 1
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- name: DMA2_CH2_IM
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description: Peripheral DMA2 CH2 interrupt mask to CPU1
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bit_offset: 9
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bit_size: 1
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- name: DMA2_CH3_IM
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description: Peripheral DMA2 CH3 interrupt mask to CPU1
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bit_offset: 10
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bit_size: 1
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- name: DMA2_CH4_IM
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description: Peripheral DMA2 CH4 interrupt mask to CPU1
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bit_offset: 11
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bit_size: 1
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- name: DMA2_CH5_IM
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description: Peripheral DMA2 CH5 interrupt mask to CPU1
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bit_offset: 12
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bit_size: 1
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- name: DMA2_CH6_IM
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description: Peripheral DMA2 CH6 interrupt mask to CPU1
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bit_offset: 13
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bit_size: 1
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- name: DMA2_CH7_IM
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description: Peripheral DMA2 CH7 interrupt mask to CPU1
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bit_offset: 14
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bit_size: 1
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- name: DMAM_UX1_IM
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description: Peripheral DMAM UX1 interrupt mask to CPU1
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bit_offset: 15
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bit_size: 1
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- name: PVM1IM
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description: Peripheral PVM1IM interrupt mask to CPU1
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bit_offset: 16
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bit_size: 1
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- name: PVM3IM
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description: Peripheral PVM3IM interrupt mask to CPU1
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bit_offset: 18
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bit_size: 1
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- name: PVDIM
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description: Peripheral PVDIM interrupt mask to CPU1
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bit_offset: 20
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bit_size: 1
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- name: TSCIM
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description: Peripheral TSCIM interrupt mask to CPU1
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bit_offset: 21
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bit_size: 1
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- name: LCDIM
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description: Peripheral LCDIM interrupt mask to CPU1
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bit_offset: 22
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bit_size: 1
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fieldset/CFGR1:
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description: configuration register 1
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fields:
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- name: BOOSTEN
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description: I/O analog switch voltage booster enable
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bit_offset: 8
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bit_size: 1
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- name: I2C_PB6_FMP
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description: Fast-mode Plus (Fm+) driving capability activation on PB6
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bit_offset: 16
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bit_size: 1
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- name: I2C_PB7_FMP
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description: Fast-mode Plus (Fm+) driving capability activation on PB7
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bit_offset: 17
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bit_size: 1
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- name: I2C_PB8_FMP
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description: Fast-mode Plus (Fm+) driving capability activation on PB8
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bit_offset: 18
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bit_size: 1
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- name: I2C_PB9_FMP
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description: Fast-mode Plus (Fm+) driving capability activation on PB9
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bit_offset: 19
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bit_size: 1
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- name: I2C1_FMP
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description: I2C1 Fast-mode Plus driving capability activation
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bit_offset: 20
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bit_size: 1
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- name: I2C3_FMP
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description: I2C3 Fast-mode Plus driving capability activation
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bit_offset: 22
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bit_size: 1
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- name: FPU_IE
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description: Floating Point Unit interrupts enable bits
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bit_offset: 26
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bit_size: 6
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fieldset/CFGR2:
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description: CFGR2
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fields:
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- name: CLL
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description: Cortex-M4 LOCKUP (Hardfault) output enable bit
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bit_offset: 0
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bit_size: 1
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- name: SPL
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description: SRAM2 parity lock bit
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bit_offset: 1
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bit_size: 1
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- name: PVDL
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description: PVD lock enable bit
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bit_offset: 2
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bit_size: 1
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- name: ECCL
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description: ECC Lock
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bit_offset: 3
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bit_size: 1
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- name: SPF
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description: SRAM2 parity error flag
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bit_offset: 8
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bit_size: 1
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fieldset/EXTICR:
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description: external interrupt configuration register 1
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fields:
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- name: EXTI
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description: EXTI 0 configuration bits
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bit_offset: 0
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bit_size: 3
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array:
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len: 4
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stride: 4
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fieldset/IMR1:
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description: CPU1 interrupt mask register 1
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fields:
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- name: TIM1IM
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description: Peripheral TIM1 interrupt mask to CPU1
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bit_offset: 13
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bit_size: 1
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- name: TIM16IM
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description: Peripheral TIM16 interrupt mask to CPU1
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bit_offset: 14
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bit_size: 1
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- name: TIM17IM
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description: Peripheral TIM17 interrupt mask to CPU1
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bit_offset: 15
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bit_size: 1
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- name: EXIT5IM
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description: Peripheral EXIT5 interrupt mask to CPU1
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bit_offset: 21
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bit_size: 1
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- name: EXIT6IM
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description: Peripheral EXIT6 interrupt mask to CPU1
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bit_offset: 22
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bit_size: 1
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- name: EXIT7IM
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description: Peripheral EXIT7 interrupt mask to CPU1
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bit_offset: 23
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bit_size: 1
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- name: EXIT8IM
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description: Peripheral EXIT8 interrupt mask to CPU1
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bit_offset: 24
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bit_size: 1
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- name: EXIT9IM
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description: Peripheral EXIT9 interrupt mask to CPU1
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bit_offset: 25
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bit_size: 1
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- name: EXIT10IM
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description: Peripheral EXIT10 interrupt mask to CPU1
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bit_offset: 26
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bit_size: 1
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- name: EXIT11IM
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description: Peripheral EXIT11 interrupt mask to CPU1
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bit_offset: 27
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bit_size: 1
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- name: EXIT12IM
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description: Peripheral EXIT12 interrupt mask to CPU1
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bit_offset: 28
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bit_size: 1
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- name: EXIT13IM
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description: Peripheral EXIT13 interrupt mask to CPU1
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bit_offset: 29
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bit_size: 1
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- name: EXIT14IM
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description: Peripheral EXIT14 interrupt mask to CPU1
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bit_offset: 30
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bit_size: 1
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- name: EXIT15IM
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description: Peripheral EXIT15 interrupt mask to CPU1
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bit_offset: 31
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bit_size: 1
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fieldset/IMR2:
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description: CPU1 interrupt mask register 2
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fields:
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- name: PVM1IM
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description: Peripheral PVM1 interrupt mask to CPU1
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bit_offset: 16
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bit_size: 1
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- name: PVM3IM
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description: Peripheral PVM3 interrupt mask to CPU1
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bit_offset: 18
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bit_size: 1
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- name: PVDIM
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description: Peripheral PVD interrupt mask to CPU1
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bit_offset: 20
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bit_size: 1
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fieldset/MEMRMP:
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description: memory remap register
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fields:
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- name: MEM_MODE
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description: Memory mapping selection
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bit_offset: 0
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bit_size: 3
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fieldset/SCSR:
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description: SCSR
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fields:
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- name: SRAM2ER
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description: SRAM2 Erase
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bit_offset: 0
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bit_size: 1
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- name: SRAM2BSY
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description: SRAM2 busy by erase operation
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bit_offset: 1
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bit_size: 1
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- name: C2RFD
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description: CPU2 SRAM fetch (execution) disable.
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bit_offset: 31
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bit_size: 1
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fieldset/SIPCR:
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description: secure IP control register
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fields:
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- name: SAES
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description: "Enable AES1 KEY[7:0] security."
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bit_offset: 0
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bit_size: 1
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array:
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len: 2
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stride: 1
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- name: SPKA
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description: Enable PKA security
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bit_offset: 2
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bit_size: 1
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- name: SRNG
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description: Enable True RNG security
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bit_offset: 3
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bit_size: 1
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fieldset/SKR:
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description: SKR
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fields:
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- name: KEY
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description: SRAM2 write protection key for software erase
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bit_offset: 0
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bit_size: 8
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fieldset/SWPR:
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description: SRAM2 write protection register
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fields:
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- name: PWP
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description: P0WP
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bit_offset: 0
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bit_size: 1
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array:
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len: 32
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stride: 1
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fieldset/SWPR2:
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description: SRAM2 write protection register 2
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fields:
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- name: PWP
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description: P32WP
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bit_offset: 0
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bit_size: 1
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array:
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len: 32
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stride: 1
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