414 lines
5.2 KiB
YAML
414 lines
5.2 KiB
YAML
PA0:
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COMP1_OUT: 7
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TIM2_CH1: 2
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TIM2_ETR: 5
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TSC_G1_IO1: 3
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USART2_CTS: 4
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USART4_TX: 6
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PA1:
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EVENTOUT: 0
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LCD_SEG0: 1
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TIM21_ETR: 5
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TIM2_CH2: 2
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TSC_G1_IO2: 3
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USART2_DE: 4
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USART2_RTS: 4
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USART4_RX: 6
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PA10:
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I2C1_SDA: 6
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LCD_COM2: 1
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TSC_G4_IO2: 3
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USART1_RX: 4
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PA11:
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COMP1_OUT: 7
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EVENTOUT: 2
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SPI1_MISO: 0
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TSC_G4_IO3: 3
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USART1_CTS: 4
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PA12:
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COMP2_OUT: 7
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EVENTOUT: 2
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SPI1_MOSI: 0
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TSC_G4_IO4: 3
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USART1_DE: 4
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USART1_RTS: 4
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PA13:
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LPUART1_RX: 6
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SYS_SWDIO: 0
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USB_NOE: 2
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PA14:
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LPUART1_TX: 6
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SYS_SWCLK: 0
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USART2_TX: 4
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PA15:
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EVENTOUT: 3
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LCD_SEG17: 1
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SPI1_NSS: 0
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TIM2_CH1: 5
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TIM2_ETR: 2
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USART2_RX: 4
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USART4_DE: 6
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USART4_RTS: 6
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PA2:
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COMP2_OUT: 7
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LCD_SEG1: 1
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LPUART1_TX: 6
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TIM21_CH1: 0
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TIM2_CH3: 2
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TSC_G1_IO3: 3
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USART2_TX: 4
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PA3:
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LCD_SEG2: 1
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LPUART1_RX: 6
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TIM21_CH2: 0
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TIM2_CH4: 2
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TSC_G1_IO4: 3
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USART2_RX: 4
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PA4:
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SPI1_NSS: 0
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TIM22_ETR: 5
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TSC_G2_IO1: 3
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USART2_CK: 4
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PA5:
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SPI1_SCK: 0
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TIM2_CH1: 5
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TIM2_ETR: 2
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TSC_G2_IO2: 3
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PA6:
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COMP1_OUT: 7
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EVENTOUT: 6
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LCD_SEG3: 1
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LPUART1_CTS: 4
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SPI1_MISO: 0
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TIM22_CH1: 5
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TIM3_CH1: 2
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TSC_G2_IO3: 3
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PA7:
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COMP2_OUT: 7
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EVENTOUT: 6
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LCD_SEG4: 1
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SPI1_MOSI: 0
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TIM22_CH2: 5
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TIM3_CH2: 2
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TSC_G2_IO4: 3
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PA8:
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CRS_SYNC: 2
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EVENTOUT: 3
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I2C3_SCL: 7
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LCD_COM0: 1
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RCC_MCO: 0
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USART1_CK: 4
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PA9:
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I2C1_SCL: 6
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I2C3_SMBA: 7
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LCD_COM1: 1
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RCC_MCO: 0
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TSC_G4_IO1: 3
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USART1_TX: 4
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PB0:
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EVENTOUT: 0
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LCD_SEG5: 1
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TIM3_CH3: 2
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TSC_G3_IO2: 3
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PB1:
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LCD_SEG6: 1
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LPUART1_DE: 4
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LPUART1_RTS: 4
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TIM3_CH4: 2
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TSC_G3_IO3: 3
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PB10:
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I2C2_SCL: 6
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LCD_SEG10: 1
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LPUART1_RX: 7
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LPUART1_TX: 4
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SPI2_SCK: 5
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TIM2_CH3: 2
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TSC_SYNC: 3
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PB11:
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EVENTOUT: 0
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I2C2_SDA: 6
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LCD_SEG11: 1
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LPUART1_RX: 4
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LPUART1_TX: 7
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TIM2_CH4: 2
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TSC_G6_IO1: 3
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PB12:
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EVENTOUT: 6
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I2C2_SMBA: 5
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I2S2_WS: 0
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LCD_SEG12: 1
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LPUART1_DE: 2
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LPUART1_RTS: 2
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SPI2_NSS: 0
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TSC_G6_IO2: 3
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PB13:
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I2C2_SCL: 5
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I2S2_CK: 0
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LCD_SEG13: 1
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LPUART1_CTS: 4
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RCC_MCO: 2
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SPI2_SCK: 0
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TIM21_CH1: 6
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TSC_G6_IO3: 3
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PB14:
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I2C2_SDA: 5
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I2S2_MCK: 0
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LCD_SEG14: 1
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LPUART1_DE: 4
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LPUART1_RTS: 4
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RTC_OUT_ALARM: 2
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RTC_OUT_CALIB: 2
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SPI2_MISO: 0
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TIM21_CH2: 6
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TSC_G6_IO4: 3
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PB15:
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I2S2_SD: 0
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LCD_SEG15: 1
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RTC_REFIN: 2
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SPI2_MOSI: 0
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PB2:
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I2C3_SMBA: 7
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LPTIM1_OUT: 2
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TSC_G3_IO4: 3
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PB3:
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EVENTOUT: 4
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LCD_SEG7: 1
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SPI1_SCK: 0
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TIM2_CH2: 2
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TSC_G5_IO1: 3
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USART1_DE: 5
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USART1_RTS: 5
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USART5_TX: 6
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PB4:
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I2C3_SDA: 7
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LCD_SEG8: 1
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SPI1_MISO: 0
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TIM22_CH1: 4
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TIM3_CH1: 2
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TSC_G5_IO2: 3
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USART1_CTS: 5
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USART5_RX: 6
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PB5:
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I2C1_SMBA: 3
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LCD_SEG9: 1
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LPTIM1_IN1: 2
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SPI1_MOSI: 0
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TIM22_CH2: 4
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TIM3_CH2: 4
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USART1_CK: 5
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USART5_CK: 6
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USART5_DE: 6
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USART5_RTS: 6
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PB6:
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I2C1_SCL: 1
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LPTIM1_ETR: 2
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TSC_G5_IO3: 3
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USART1_TX: 0
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PB7:
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I2C1_SDA: 1
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LPTIM1_IN2: 2
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TSC_G5_IO4: 3
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USART1_RX: 0
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USART4_CTS: 6
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PB8:
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I2C1_SCL: 4
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LCD_SEG16: 1
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TSC_SYNC: 3
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PB9:
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EVENTOUT: 2
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I2C1_SDA: 4
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I2S2_WS: 5
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LCD_COM3: 1
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SPI2_NSS: 5
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PC0:
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EVENTOUT: 2
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I2C3_SCL: 7
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LCD_SEG18: 1
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LPTIM1_IN1: 0
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LPUART1_RX: 6
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TSC_G7_IO1: 3
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PC1:
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EVENTOUT: 2
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I2C3_SDA: 7
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LCD_SEG19: 1
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LPTIM1_OUT: 0
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LPUART1_TX: 6
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TSC_G7_IO2: 3
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PC10:
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LCD_COM4: 1
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LCD_SEG28: 1
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LCD_SEG48: 1
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LPUART1_TX: 0
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USART4_TX: 6
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PC11:
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LCD_COM5: 1
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LCD_SEG29: 1
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LCD_SEG49: 1
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LPUART1_RX: 0
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USART4_RX: 6
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PC12:
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LCD_COM6: 1
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LCD_SEG30: 1
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LCD_SEG50: 1
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USART4_CK: 6
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USART5_TX: 2
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PC13: {}
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PC14: {}
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PC15: {}
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PC2:
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I2S2_MCK: 2
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LCD_SEG20: 1
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LPTIM1_IN2: 0
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SPI2_MISO: 2
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TSC_G7_IO3: 3
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PC3:
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I2S2_SD: 2
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LCD_SEG21: 1
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LPTIM1_ETR: 0
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SPI2_MOSI: 2
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TSC_G7_IO4: 3
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PC4:
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EVENTOUT: 0
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LCD_SEG22: 1
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LPUART1_TX: 2
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PC5:
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LCD_SEG23: 1
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LPUART1_RX: 2
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TSC_G3_IO1: 3
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PC6:
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LCD_SEG24: 1
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TIM22_CH1: 0
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TIM3_CH1: 2
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TSC_G8_IO1: 3
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PC7:
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LCD_SEG25: 1
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TIM22_CH2: 0
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TIM3_CH2: 2
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TSC_G8_IO2: 3
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PC8:
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LCD_SEG26: 1
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TIM22_ETR: 0
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TIM3_CH3: 2
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TSC_G8_IO3: 3
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PC9:
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I2C3_SDA: 7
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LCD_SEG27: 1
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TIM21_ETR: 0
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TIM3_CH4: 2
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TSC_G8_IO4: 3
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USB_NOE: 2
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PD0:
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I2S2_WS: 1
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SPI2_NSS: 1
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TIM21_CH1: 0
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PD1:
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I2S2_CK: 1
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SPI2_SCK: 1
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PD10:
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LCD_SEG30: 1
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PD11:
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LCD_SEG31: 1
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LPUART1_CTS: 0
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PD12:
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LCD_SEG32: 1
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LPUART1_DE: 0
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LPUART1_RTS: 0
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PD13:
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LCD_SEG33: 1
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PD14:
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LCD_SEG34: 1
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PD15:
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CRS_SYNC: 0
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LCD_SEG35: 1
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PD2:
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LCD_COM7: 1
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LCD_SEG31: 1
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LCD_SEG51: 1
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LPUART1_DE: 0
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LPUART1_RTS: 0
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TIM3_ETR: 2
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USART5_RX: 6
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PD3:
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I2S2_MCK: 2
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LCD_SEG44: 1
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SPI2_MISO: 2
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USART2_CTS: 0
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PD4:
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I2S2_SD: 1
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SPI2_MOSI: 1
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USART2_DE: 0
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USART2_RTS: 0
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PD5:
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USART2_TX: 0
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PD6:
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USART2_RX: 0
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PD7:
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TIM21_CH2: 1
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USART2_CK: 0
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PD8:
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LCD_SEG28: 1
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LPUART1_TX: 0
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PD9:
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LCD_SEG29: 1
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LPUART1_RX: 0
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PE0:
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EVENTOUT: 2
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LCD_SEG36: 1
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PE1:
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EVENTOUT: 2
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LCD_SEG37: 1
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PE10:
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LCD_SEG40: 1
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TIM2_CH2: 0
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USART5_TX: 6
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PE11:
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TIM2_CH3: 0
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USART5_RX: 6
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PE12:
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SPI1_NSS: 2
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TIM2_CH4: 0
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PE13:
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LCD_SEG41: 1
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SPI1_SCK: 2
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PE14:
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LCD_SEG42: 1
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SPI1_MISO: 2
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PE15:
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LCD_SEG43: 1
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SPI1_MOSI: 2
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PE2:
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LCD_SEG38: 1
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TIM3_ETR: 2
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PE3:
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LCD_SEG39: 1
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TIM22_CH1: 0
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TIM3_CH1: 2
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PE4:
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TIM22_CH2: 0
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TIM3_CH2: 2
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PE5:
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TIM21_CH1: 0
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TIM3_CH3: 2
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PE6:
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TIM21_CH2: 0
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TIM3_CH4: 2
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PE7:
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LCD_SEG45: 1
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USART5_CK: 6
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USART5_DE: 6
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USART5_RTS: 6
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PE8:
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LCD_SEG46: 1
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USART4_TX: 6
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PE9:
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LCD_SEG47: 1
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TIM2_CH1: 0
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TIM2_ETR: 2
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USART4_RX: 6
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PH0:
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CRS_SYNC: 0
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PH1: {}
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PH10: {}
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PH9: {}
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PI8: {}
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