173 lines
4.4 KiB
YAML
173 lines
4.4 KiB
YAML
block/DBGMCU:
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description: Debug support
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items:
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- name: IDCODE
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description: MCU Device ID Code Register
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byte_offset: 0
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access: Read
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fieldset: IDCODE
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- name: CR
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description: Debug MCU Configuration Register
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byte_offset: 4
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fieldset: CR
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- name: APB1FZR1
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description: APB1 Low Freeze Register CPU1
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byte_offset: 60
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fieldset: APB1FZR1
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- name: C2AP_B1FZR1
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description: APB1 Low Freeze Register CPU2
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byte_offset: 64
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fieldset: C2AP_B1FZR1
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- name: APB1FZR2
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description: APB1 High Freeze Register CPU1
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byte_offset: 68
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fieldset: APB1FZR2
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- name: C2APB1FZR2
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description: APB1 High Freeze Register CPU2
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byte_offset: 72
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fieldset: C2APB1FZR2
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- name: C2APB2FZR
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description: APB2 Freeze Register CPU2
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byte_offset: 72
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fieldset: C2APB2FZR
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- name: APB2FZR
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description: APB2 Freeze Register CPU1
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byte_offset: 76
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fieldset: APB2FZR
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fieldset/APB1FZR1:
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description: APB1 Low Freeze Register CPU1
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fields:
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- name: TIM2
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description: Debug Timer 2 stopped when Core is halted
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bit_offset: 0
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bit_size: 1
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- name: RTC
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description: RTC counter stopped when core is halted
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bit_offset: 10
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bit_size: 1
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- name: WWDG
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description: WWDG counter stopped when core is halted
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bit_offset: 11
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bit_size: 1
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- name: IWDG
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description: IWDG counter stopped when core is halted
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bit_offset: 12
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bit_size: 1
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- name: I2C1
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description: Debug I2C1 SMBUS timeout stopped when Core is halted
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bit_offset: 21
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bit_size: 1
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- name: I2C3
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description: Debug I2C3 SMBUS timeout stopped when core is halted
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bit_offset: 23
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bit_size: 1
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- name: LPTIM1
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description: Debug LPTIM1 stopped when Core is halted
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bit_offset: 31
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bit_size: 1
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fieldset/APB1FZR2:
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description: APB1 High Freeze Register CPU1
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fields:
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- name: LPTIM2
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description: LPTIM2 counter stopped when core is halted
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bit_offset: 5
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bit_size: 1
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fieldset/APB2FZR:
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description: APB2 Freeze Register CPU1
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fields:
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- name: TIM1
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description: TIM1 counter stopped when core is halted
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bit_offset: 11
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bit_size: 1
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- name: TIM16
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description: TIM16 counter stopped when core is halted
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bit_offset: 17
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bit_size: 1
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- name: TIM17
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description: TIM17 counter stopped when core is halted
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bit_offset: 18
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bit_size: 1
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fieldset/C2APB1FZR2:
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description: APB1 High Freeze Register CPU2
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fields:
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- name: LPTIM2
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description: LPTIM2 counter stopped when core is halted
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bit_offset: 5
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bit_size: 1
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fieldset/C2APB2FZR:
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description: APB2 Freeze Register CPU2
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fields:
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- name: TIM1
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description: TIM1 counter stopped when core is halted
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bit_offset: 11
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bit_size: 1
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- name: TIM16
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description: TIM16 counter stopped when core is halted
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bit_offset: 17
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bit_size: 1
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- name: TIM17
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description: TIM17 counter stopped when core is halted
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bit_offset: 18
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bit_size: 1
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fieldset/C2AP_B1FZR1:
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description: APB1 Low Freeze Register CPU2
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fields:
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- name: LPTIM2
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description: LPTIM2 counter stopped when core is halted
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bit_offset: 0
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bit_size: 1
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- name: RTC
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description: RTC counter stopped when core is halted
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bit_offset: 10
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bit_size: 1
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- name: IWDG
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description: IWDG stopped when core is halted
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bit_offset: 12
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bit_size: 1
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- name: I2C1
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description: I2C1 SMBUS timeout stopped when core is halted
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bit_offset: 21
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bit_size: 1
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- name: I2C3
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description: I2C3 SMBUS timeout stopped when core is halted
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bit_offset: 23
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bit_size: 1
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- name: LPTIM1
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description: LPTIM1 counter stopped when core is halted
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bit_offset: 31
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bit_size: 1
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fieldset/CR:
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description: Debug MCU Configuration Register
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fields:
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- name: DBG_SLEEP
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description: Debug Sleep Mode
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bit_offset: 0
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bit_size: 1
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- name: DBG_STOP
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description: Debug Stop Mode
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bit_offset: 1
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bit_size: 1
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- name: DBG_STANDBY
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description: Debug Standby Mode
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bit_offset: 2
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bit_size: 1
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- name: TRACE_IOEN
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description: Trace port and clock enable
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bit_offset: 5
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bit_size: 1
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- name: TRGOEN
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description: External trigger output enable
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bit_offset: 28
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bit_size: 1
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fieldset/IDCODE:
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description: MCU Device ID Code Register
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fields:
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- name: DEV_ID
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description: Device Identifier
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bit_offset: 0
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bit_size: 12
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- name: REV_ID
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description: Revision Identifier
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bit_offset: 16
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bit_size: 16
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