PA0: COMP1_OUT: 8 EVENTOUT: 15 TIM19_CH1: 11 TIM2_CH1: 1 TIM2_ETR: 1 TIM5_CH1: 2 TIM5_ETR: 2 TSC_G1_IO1: 3 USART2_CTS: 7 PA1: EVENTOUT: 15 I2S3_CK: 6 RTC_REFIN: 0 SPI3_SCK: 6 TIM15_CH1N: 9 TIM19_CH2: 11 TIM2_CH2: 1 TIM5_CH2: 2 TSC_G1_IO2: 3 USART2_DE: 7 USART2_RTS: 7 PA10: EVENTOUT: 15 I2C2_SDA: 4 I2S2_SD: 5 SPI2_MOSI: 5 TIM14_CH1: 9 TIM17_BKIN: 1 TIM2_CH4: 10 TSC_G4_IO2: 3 USART1_RX: 7 PA11: CAN_RX: 9 COMP1_OUT: 8 EVENTOUT: 15 I2S1_WS: 6 I2S2_WS: 5 SPI1_NSS: 6 SPI2_NSS: 5 TIM4_CH1: 10 TIM5_CH2: 2 USART1_CTS: 7 USB_DM: 14 PA12: CAN_TX: 9 COMP2_OUT: 8 EVENTOUT: 15 I2S1_CK: 6 SPI1_SCK: 6 TIM16_CH1: 1 TIM4_CH2: 10 TIM5_CH3: 2 USART1_DE: 7 USART1_RTS: 7 USB_DP: 14 PA13: EVENTOUT: 15 I2S1_MCK: 6 IR_OUT: 5 SPI1_MISO: 6 SYS_JTMS-SWDIO: 0 TIM16_CH1N: 1 TIM4_CH3: 10 TIM5_CH4: 2 TSC_G4_IO3: 3 USART3_CTS: 7 PA14: EVENTOUT: 15 I2C1_SDA: 4 SYS_JTCK-SWCLK: 0 TIM12_CH1: 10 TSC_G4_IO4: 3 PA15: EVENTOUT: 15 I2C1_SCL: 4 I2S1_WS: 5 I2S3_WS: 6 SPI1_NSS: 5 SPI3_NSS: 6 SYS_JTDI: 0 TIM12_CH2: 10 TIM2_CH1: 1 TIM2_ETR: 1 TSC_SYNC: 3 PA2: COMP2_OUT: 8 EVENTOUT: 15 I2S3_MCK: 6 SPI3_MISO: 6 TIM15_CH1: 9 TIM19_CH3: 11 TIM2_CH3: 1 TIM5_CH3: 2 TSC_G1_IO3: 3 USART2_TX: 7 PA3: EVENTOUT: 15 I2S3_SD: 6 SPI3_MOSI: 6 TIM15_CH2: 9 TIM19_CH4: 11 TIM2_CH4: 1 TIM5_CH4: 2 TSC_G1_IO4: 3 USART2_RX: 7 PA4: EVENTOUT: 15 I2S1_WS: 5 I2S3_WS: 6 SPI1_NSS: 5 SPI3_NSS: 6 TIM12_CH1: 10 TIM3_CH2: 2 TSC_G2_IO1: 3 USART2_CK: 7 PA5: CEC: 7 EVENTOUT: 15 I2S1_CK: 5 SPI1_SCK: 5 TIM12_CH2: 10 TIM14_CH1: 9 TIM2_CH1: 1 TIM2_ETR: 1 TSC_G2_IO2: 3 PA6: COMP1_OUT: 8 EVENTOUT: 15 I2S1_MCK: 5 SPI1_MISO: 5 TIM13_CH1: 9 TIM16_CH1: 1 TIM3_CH1: 2 TSC_G2_IO3: 3 PA7: COMP2_OUT: 8 EVENTOUT: 15 I2S1_SD: 5 SPI1_MOSI: 5 TIM14_CH1: 9 TIM17_CH1: 1 TIM3_CH2: 2 TSC_G2_IO4: 3 PA8: EVENTOUT: 15 I2C2_SMBA: 4 I2S2_CK: 5 RCC_MCO: 0 SPI2_SCK: 5 TIM4_ETR: 10 TIM5_CH1: 2 TIM5_ETR: 2 USART1_CK: 7 PA9: EVENTOUT: 15 I2C2_SCL: 4 I2S2_MCK: 5 SPI2_MISO: 5 TIM13_CH1: 2 TIM15_BKIN: 9 TIM2_CH3: 10 TSC_G4_IO1: 3 USART1_TX: 7 PB0: EVENTOUT: 15 I2S1_SD: 5 SPI1_MOSI: 5 TIM3_CH2: 10 TIM3_CH3: 2 TSC_G3_IO3: 3 PB1: EVENTOUT: 15 TIM3_CH4: 2 TSC_G3_IO4: 3 PB10: CEC: 6 EVENTOUT: 15 I2S2_CK: 5 SPI2_SCK: 5 TIM2_CH3: 1 TSC_SYNC: 3 USART3_TX: 7 PB14: EVENTOUT: 15 I2S2_MCK: 5 SPI2_MISO: 5 TIM12_CH1: 9 TIM15_CH1: 1 TSC_G6_IO1: 3 USART3_DE: 7 USART3_RTS: 7 PB15: EVENTOUT: 15 I2S2_SD: 5 RTC_REFIN: 0 SPI2_MOSI: 5 TIM12_CH2: 9 TIM15_CH1N: 2 TIM15_CH2: 1 TSC_G6_IO2: 3 PB2: EVENTOUT: 15 PB3: EVENTOUT: 15 I2S1_CK: 5 I2S3_CK: 6 SPI1_SCK: 5 SPI3_SCK: 6 SYS_JTDO-TRACESWO: 0 TIM13_CH1: 9 TIM2_CH2: 1 TIM3_ETR: 10 TIM4_ETR: 2 TSC_G5_IO1: 3 USART2_TX: 7 PB4: EVENTOUT: 15 I2S1_MCK: 5 I2S3_MCK: 6 SPI1_MISO: 5 SPI3_MISO: 6 SYS_NJTRST: 0 TIM15_CH1N: 9 TIM16_CH1: 1 TIM17_BKIN: 10 TIM3_CH1: 2 TSC_G5_IO2: 3 USART2_RX: 7 PB5: EVENTOUT: 15 I2C1_SMBA: 4 I2S1_SD: 5 I2S3_SD: 6 SPI1_MOSI: 5 SPI3_MOSI: 6 TIM16_BKIN: 1 TIM17_CH1: 10 TIM19_ETR: 11 TIM3_CH2: 2 USART2_CK: 7 PB6: EVENTOUT: 15 I2C1_SCL: 4 TIM15_CH1: 9 TIM16_CH1N: 1 TIM19_CH1: 11 TIM3_CH3: 10 TIM4_CH1: 2 TSC_G5_IO3: 3 USART1_TX: 7 PB7: EVENTOUT: 15 I2C1_SDA: 4 TIM15_CH2: 9 TIM17_CH1N: 1 TIM19_CH2: 11 TIM3_CH4: 10 TIM4_CH2: 2 TSC_G5_IO4: 3 USART1_RX: 7 PB8: CAN_RX: 9 CEC: 6 COMP1_OUT: 8 EVENTOUT: 15 I2C1_SCL: 4 I2S2_CK: 5 SPI2_SCK: 5 TIM16_CH1: 1 TIM19_CH3: 11 TIM4_CH3: 2 TSC_SYNC: 3 USART3_TX: 7 PB9: CAN_TX: 9 COMP2_OUT: 8 EVENTOUT: 15 I2C1_SDA: 4 I2S2_WS: 5 IR_OUT: 6 SPI2_NSS: 5 TIM17_CH1: 1 TIM19_CH4: 11 TIM4_CH4: 2 USART3_RX: 7 PC0: EVENTOUT: 1 TIM5_CH1: 2 TIM5_ETR: 2 PC1: EVENTOUT: 1 TIM5_CH2: 2 PC10: EVENTOUT: 1 I2S3_CK: 6 SPI3_SCK: 6 TIM19_CH1: 2 USART3_TX: 7 PC11: EVENTOUT: 1 I2S3_MCK: 6 SPI3_MISO: 6 TIM19_CH2: 2 USART3_RX: 7 PC12: EVENTOUT: 1 I2S3_SD: 6 SPI3_MOSI: 6 TIM19_CH3: 2 USART3_CK: 7 PC13: {} PC14: {} PC15: {} PC2: EVENTOUT: 1 I2S2_MCK: 5 SPI2_MISO: 5 TIM5_CH3: 2 PC3: EVENTOUT: 1 I2S2_SD: 5 SPI2_MOSI: 5 TIM5_CH4: 2 PC4: EVENTOUT: 1 TIM13_CH1: 2 TSC_G3_IO1: 3 USART1_TX: 7 PC5: EVENTOUT: 1 TSC_G3_IO2: 3 USART1_RX: 7 PC6: EVENTOUT: 1 I2S1_WS: 5 SPI1_NSS: 5 TIM3_CH1: 2 PC7: EVENTOUT: 1 I2S1_CK: 5 SPI1_SCK: 5 TIM3_CH2: 2 PC8: EVENTOUT: 1 I2S1_MCK: 5 SPI1_MISO: 5 TIM3_CH3: 2 PC9: EVENTOUT: 1 I2S1_SD: 5 SPI1_MOSI: 5 TIM3_CH4: 2 PD0: CAN_RX: 7 EVENTOUT: 1 TIM19_CH4: 2 PD1: CAN_TX: 7 EVENTOUT: 1 TIM19_ETR: 2 PD10: EVENTOUT: 1 USART3_CK: 7 PD11: EVENTOUT: 1 USART3_CTS: 7 PD12: EVENTOUT: 1 TIM4_CH1: 2 TSC_G8_IO1: 3 USART3_DE: 7 USART3_RTS: 7 PD13: EVENTOUT: 1 TIM4_CH2: 2 TSC_G8_IO2: 3 PD14: EVENTOUT: 1 TIM4_CH3: 2 TSC_G8_IO3: 3 PD15: EVENTOUT: 1 TIM4_CH4: 2 TSC_G8_IO4: 3 PD2: EVENTOUT: 1 TIM3_ETR: 2 PD3: EVENTOUT: 1 I2S2_MCK: 5 SPI2_MISO: 5 USART2_CTS: 7 PD4: EVENTOUT: 1 I2S2_SD: 5 SPI2_MOSI: 5 USART2_DE: 7 USART2_RTS: 7 PD5: EVENTOUT: 1 USART2_TX: 7 PD6: EVENTOUT: 1 I2S2_WS: 5 SPI2_NSS: 5 USART2_RX: 7 PD7: EVENTOUT: 1 I2S2_CK: 5 SPI2_SCK: 5 USART2_CK: 7 PD8: EVENTOUT: 1 I2S2_CK: 5 SPI2_SCK: 5 TSC_G6_IO3: 3 USART3_TX: 7 PD9: EVENTOUT: 1 TSC_G6_IO4: 3 USART3_RX: 7 PE0: EVENTOUT: 1 TIM4_ETR: 2 USART1_TX: 7 PE1: EVENTOUT: 1 USART1_RX: 7 PE10: EVENTOUT: 1 PE11: EVENTOUT: 1 PE12: EVENTOUT: 1 PE13: EVENTOUT: 1 PE14: EVENTOUT: 1 PE15: EVENTOUT: 1 USART3_RX: 7 PE2: EVENTOUT: 1 SYS_TRACECK: 0 TSC_G7_IO1: 3 PE3: EVENTOUT: 1 SYS_TRACED0: 0 TSC_G7_IO2: 3 PE4: EVENTOUT: 1 SYS_TRACED1: 0 TSC_G7_IO3: 3 PE5: EVENTOUT: 1 SYS_TRACED2: 0 TSC_G7_IO4: 3 PE6: EVENTOUT: 1 SYS_TRACED3: 0 PE7: EVENTOUT: 1 PE8: EVENTOUT: 1 PE9: EVENTOUT: 1 PF0: I2C2_SDA: 4 PF1: I2C2_SCL: 4 PF10: EVENTOUT: 1 PF2: EVENTOUT: 1 I2C2_SMBA: 4 PF4: EVENTOUT: 1 PF6: EVENTOUT: 1 I2C2_SCL: 4 I2S1_SD: 5 SPI1_MOSI: 5 TIM4_CH4: 2 USART3_DE: 7 USART3_RTS: 7 PF7: EVENTOUT: 1 I2C2_SDA: 4 USART2_CK: 7 PF9: EVENTOUT: 1 TIM14_CH1: 2