PA0: COMP1_OUT: 8 EVENTOUT: 15 TIM2_CH1: 1 TIM2_ETR: 1 TIM8_BKIN: 9 TIM8_ETR: 10 TSC_G1_IO1: 3 USART2_CTS: 7 PA1: EVENTOUT: 15 RTC_REFIN: 0 TIM15_CH1N: 9 TIM2_CH2: 1 TSC_G1_IO2: 3 USART2_DE: 7 USART2_RTS: 7 PA10: COMP6_OUT: 8 EVENTOUT: 15 I2C2_SDA: 4 I2S2_ext_SD: 5 SPI2_MISO: 5 TIM17_BKIN: 1 TIM1_CH3: 6 TIM2_CH4: 10 TIM8_BKIN: 11 TSC_G4_IO2: 3 USART1_RX: 7 PA11: CAN_RX: 9 COMP1_OUT: 8 EVENTOUT: 15 I2S2_SD: 5 SPI2_MOSI: 5 TIM1_BKIN2: 12 TIM1_CH1N: 6 TIM1_CH4: 11 TIM4_CH1: 10 USART1_CTS: 7 PA12: CAN_TX: 9 COMP2_OUT: 8 EVENTOUT: 15 I2S_CKIN: 5 TIM16_CH1: 1 TIM1_CH2N: 6 TIM1_ETR: 11 TIM4_CH2: 10 USART1_DE: 7 USART1_RTS: 7 PA13: EVENTOUT: 15 IR_OUT: 5 SYS_JTMS-SWDIO: 0 TIM16_CH1N: 1 TIM4_CH3: 10 TSC_G4_IO3: 3 USART3_CTS: 7 PA14: EVENTOUT: 15 I2C1_SDA: 4 SYS_JTCK-SWCLK: 0 TIM1_BKIN: 6 TIM8_CH2: 5 TSC_G4_IO4: 3 USART2_TX: 7 PA15: EVENTOUT: 15 I2C1_SCL: 4 I2S3_WS: 6 SPI1_NSS: 5 SPI3_NSS: 6 SYS_JTDI: 0 TIM1_BKIN: 9 TIM2_CH1: 1 TIM2_ETR: 1 TIM8_CH1: 2 TSC_SYNC: 3 USART2_RX: 7 PA2: COMP2_OUT: 8 EVENTOUT: 15 TIM15_CH1: 9 TIM2_CH3: 1 TSC_G1_IO3: 3 USART2_TX: 7 PA3: EVENTOUT: 15 TIM15_CH2: 9 TIM2_CH4: 1 TSC_G1_IO4: 3 USART2_RX: 7 PA4: EVENTOUT: 15 I2S3_WS: 6 SPI1_NSS: 5 SPI3_NSS: 6 TIM3_CH2: 2 TSC_G2_IO1: 3 USART2_CK: 7 PA5: EVENTOUT: 15 SPI1_SCK: 5 TIM2_CH1: 1 TIM2_ETR: 1 TSC_G2_IO2: 3 PA6: COMP1_OUT: 8 EVENTOUT: 15 SPI1_MISO: 5 TIM16_CH1: 1 TIM1_BKIN: 6 TIM3_CH1: 2 TIM8_BKIN: 4 TSC_G2_IO3: 3 PA7: EVENTOUT: 15 SPI1_MOSI: 5 TIM17_CH1: 1 TIM1_CH1N: 6 TIM3_CH2: 2 TIM8_CH1N: 4 TSC_G2_IO4: 3 PA8: COMP3_OUT: 8 EVENTOUT: 15 I2C2_SMBA: 4 I2C3_SCL: 3 I2S2_MCK: 5 RCC_MCO: 0 TIM1_CH1: 6 TIM4_ETR: 10 USART1_CK: 7 PA9: COMP5_OUT: 8 EVENTOUT: 15 I2C2_SCL: 4 I2C3_SMBA: 2 I2S3_MCK: 5 TIM15_BKIN: 9 TIM1_CH2: 6 TIM2_CH3: 10 TSC_G4_IO1: 3 USART1_TX: 7 PB0: EVENTOUT: 15 TIM1_CH2N: 6 TIM3_CH3: 2 TIM8_CH2N: 4 TSC_G3_IO2: 3 PB1: COMP4_OUT: 8 EVENTOUT: 15 TIM1_CH3N: 6 TIM3_CH4: 2 TIM8_CH3N: 4 TSC_G3_IO3: 3 PB10: EVENTOUT: 15 TIM2_CH3: 1 TSC_SYNC: 3 USART3_TX: 7 PB11: EVENTOUT: 15 TIM2_CH4: 1 TSC_G6_IO1: 3 USART3_RX: 7 PB12: EVENTOUT: 15 I2C2_SMBA: 4 I2S2_WS: 5 SPI2_NSS: 5 TIM1_BKIN: 6 TSC_G6_IO2: 3 USART3_CK: 7 PB13: EVENTOUT: 15 I2S2_CK: 5 SPI2_SCK: 5 TIM1_CH1N: 6 TSC_G6_IO3: 3 USART3_CTS: 7 PB14: EVENTOUT: 15 I2S2_ext_SD: 5 SPI2_MISO: 5 TIM15_CH1: 1 TIM1_CH2N: 6 TSC_G6_IO4: 3 USART3_DE: 7 USART3_RTS: 7 PB15: EVENTOUT: 15 I2S2_SD: 5 RTC_REFIN: 0 SPI2_MOSI: 5 TIM15_CH1N: 2 TIM15_CH2: 1 TIM1_CH3N: 4 PB2: EVENTOUT: 15 TSC_G3_IO4: 3 PB3: EVENTOUT: 15 I2S3_CK: 6 SPI1_SCK: 5 SPI3_SCK: 6 SYS_JTDO-TRACESWO: 0 TIM2_CH2: 1 TIM3_ETR: 10 TIM4_ETR: 2 TIM8_CH1N: 4 TSC_G5_IO1: 3 USART2_TX: 7 PB4: EVENTOUT: 15 I2S3_ext_SD: 6 SPI1_MISO: 5 SPI3_MISO: 6 SYS_NJTRST: 0 TIM16_CH1: 1 TIM17_BKIN: 10 TIM3_CH1: 2 TIM8_CH2N: 4 TSC_G5_IO2: 3 USART2_RX: 7 PB5: EVENTOUT: 15 I2C1_SMBA: 4 I2C3_SDA: 8 I2S3_SD: 6 SPI1_MOSI: 5 SPI3_MOSI: 6 TIM16_BKIN: 1 TIM17_CH1: 10 TIM3_CH2: 2 TIM8_CH3N: 3 USART2_CK: 7 PB6: EVENTOUT: 15 I2C1_SCL: 4 TIM16_CH1N: 1 TIM4_CH1: 2 TIM8_BKIN2: 10 TIM8_CH1: 5 TIM8_ETR: 6 TSC_G5_IO3: 3 USART1_TX: 7 PB7: EVENTOUT: 15 FMC_NL: 12 I2C1_SDA: 4 TIM17_CH1N: 1 TIM3_CH4: 10 TIM4_CH2: 2 TIM8_BKIN: 5 TSC_G5_IO4: 3 USART1_RX: 7 PB8: CAN_RX: 9 COMP1_OUT: 8 EVENTOUT: 15 I2C1_SCL: 4 TIM16_CH1: 1 TIM1_BKIN: 12 TIM4_CH3: 2 TIM8_CH2: 10 TSC_SYNC: 3 USART3_RX: 7 PB9: CAN_TX: 9 COMP2_OUT: 8 EVENTOUT: 15 I2C1_SDA: 4 IR_OUT: 6 TIM17_CH1: 1 TIM4_CH4: 2 TIM8_CH3: 10 USART3_TX: 7 PC0: EVENTOUT: 1 TIM1_CH1: 2 PC1: EVENTOUT: 1 TIM1_CH2: 2 PC10: EVENTOUT: 1 I2S3_CK: 6 SPI3_SCK: 6 TIM8_CH1N: 4 UART4_TX: 5 USART3_TX: 7 PC11: EVENTOUT: 1 I2S3_ext_SD: 6 SPI3_MISO: 6 TIM8_CH2N: 4 UART4_RX: 5 USART3_RX: 7 PC12: EVENTOUT: 1 I2S3_SD: 6 SPI3_MOSI: 6 TIM8_CH3N: 4 UART5_TX: 5 USART3_CK: 7 PC13: EVENTOUT: 1 TIM1_CH1N: 4 PC14: EVENTOUT: 1 PC15: EVENTOUT: 1 PC2: COMP7_OUT: 3 EVENTOUT: 1 TIM1_CH3: 2 PC3: EVENTOUT: 1 TIM1_BKIN2: 6 TIM1_CH4: 2 PC4: EVENTOUT: 1 TIM1_ETR: 2 USART1_TX: 7 PC5: EVENTOUT: 1 TIM15_BKIN: 2 TSC_G3_IO1: 3 USART1_RX: 7 PC6: COMP6_OUT: 7 EVENTOUT: 1 I2S2_MCK: 6 TIM3_CH1: 2 TIM8_CH1: 4 PC7: COMP5_OUT: 7 EVENTOUT: 1 I2S3_MCK: 6 TIM3_CH2: 2 TIM8_CH2: 4 PC8: COMP3_OUT: 7 EVENTOUT: 1 TIM3_CH3: 2 TIM8_CH3: 4 PC9: EVENTOUT: 1 I2C3_SDA: 3 I2S_CKIN: 5 TIM3_CH4: 2 TIM8_BKIN2: 6 TIM8_CH4: 4 PD0: CAN_RX: 7 EVENTOUT: 1 FMC_D2: 12 PD1: CAN_TX: 7 EVENTOUT: 1 FMC_D3: 12 TIM8_BKIN2: 6 TIM8_CH4: 4 PD10: EVENTOUT: 1 FMC_D15: 12 USART3_CK: 7 PD11: EVENTOUT: 1 FMC_A16: 12 USART3_CTS: 7 PD12: EVENTOUT: 1 FMC_A17: 12 TIM4_CH1: 2 TSC_G8_IO1: 3 USART3_DE: 7 USART3_RTS: 7 PD13: EVENTOUT: 1 FMC_A18: 12 TIM4_CH2: 2 TSC_G8_IO2: 3 PD14: EVENTOUT: 1 FMC_D0: 12 TIM4_CH3: 2 TSC_G8_IO3: 3 PD15: EVENTOUT: 1 FMC_D1: 12 SPI2_NSS: 6 TIM4_CH4: 2 TSC_G8_IO4: 3 PD2: EVENTOUT: 1 TIM3_ETR: 2 TIM8_BKIN: 4 UART5_RX: 5 PD3: EVENTOUT: 1 FMC_CLK: 12 TIM2_CH1: 2 TIM2_ETR: 2 USART2_CTS: 7 PD4: EVENTOUT: 1 FMC_NOE: 12 TIM2_CH2: 2 USART2_DE: 7 USART2_RTS: 7 PD5: EVENTOUT: 1 FMC_NWE: 12 USART2_TX: 7 PD6: EVENTOUT: 1 FMC_NWAIT: 12 TIM2_CH4: 2 USART2_RX: 7 PD7: EVENTOUT: 1 FMC_NCE2: 12 FMC_NE1: 12 TIM2_CH3: 2 USART2_CK: 7 PD8: EVENTOUT: 1 FMC_D13: 12 USART3_TX: 7 PD9: EVENTOUT: 1 FMC_D14: 12 USART3_RX: 7 PE0: EVENTOUT: 1 FMC_NBL0: 12 TIM16_CH1: 4 TIM20_ETR: 6 TIM4_ETR: 2 USART1_TX: 7 PE1: EVENTOUT: 1 FMC_NBL1: 12 TIM17_CH1: 4 TIM20_CH4: 6 USART1_RX: 7 PE10: EVENTOUT: 1 FMC_D7: 12 TIM1_CH2N: 2 PE11: EVENTOUT: 1 FMC_D8: 12 SPI4_NSS: 5 TIM1_CH2: 2 PE12: EVENTOUT: 1 FMC_D9: 12 SPI4_SCK: 5 TIM1_CH3N: 2 PE13: EVENTOUT: 1 FMC_D10: 12 SPI4_MISO: 5 TIM1_CH3: 2 PE14: EVENTOUT: 1 FMC_D11: 12 SPI4_MOSI: 5 TIM1_BKIN2: 6 TIM1_CH4: 2 PE15: EVENTOUT: 1 FMC_D12: 12 TIM1_BKIN: 2 USART3_RX: 7 PE2: EVENTOUT: 1 FMC_A23: 12 SPI4_SCK: 5 SYS_TRACECK: 0 TIM20_CH1: 6 TIM3_CH1: 2 TSC_G7_IO1: 3 PE3: EVENTOUT: 1 FMC_A19: 12 SPI4_NSS: 5 SYS_TRACED0: 0 TIM20_CH2: 6 TIM3_CH2: 2 TSC_G7_IO2: 3 PE4: EVENTOUT: 1 FMC_A20: 12 SPI4_NSS: 5 SYS_TRACED1: 0 TIM20_CH1N: 6 TIM3_CH3: 2 TSC_G7_IO3: 3 PE5: EVENTOUT: 1 FMC_A21: 12 SPI4_MISO: 5 SYS_TRACED2: 0 TIM20_CH2N: 6 TIM3_CH4: 2 TSC_G7_IO4: 3 PE6: EVENTOUT: 1 FMC_A22: 12 SPI4_MOSI: 5 SYS_TRACED3: 0 TIM20_CH3N: 6 PE7: EVENTOUT: 1 FMC_D4: 12 TIM1_ETR: 2 PE8: EVENTOUT: 1 FMC_D5: 12 TIM1_CH1N: 2 PE9: EVENTOUT: 1 FMC_D6: 12 TIM1_CH1: 2 PF0: EVENTOUT: 1 I2C2_SDA: 4 I2S2_WS: 5 SPI2_NSS: 5 TIM1_CH3N: 6 PF1: EVENTOUT: 1 I2C2_SCL: 4 I2S2_CK: 5 SPI2_SCK: 5 PF10: EVENTOUT: 1 FMC_INTR: 12 SPI2_SCK: 5 TIM15_CH2: 3 TIM20_BKIN2: 2 PF11: EVENTOUT: 1 TIM20_ETR: 2 PF12: EVENTOUT: 1 FMC_A6: 12 TIM20_CH1: 2 PF13: EVENTOUT: 1 FMC_A7: 12 TIM20_CH2: 2 PF14: EVENTOUT: 1 FMC_A8: 12 TIM20_CH3: 2 PF15: EVENTOUT: 1 FMC_A9: 12 TIM20_CH4: 2 PF2: EVENTOUT: 1 FMC_A2: 12 TIM20_CH3: 2 PF3: EVENTOUT: 1 FMC_A3: 12 TIM20_CH4: 2 PF4: COMP1_OUT: 2 EVENTOUT: 1 FMC_A4: 12 TIM20_CH1N: 3 PF5: EVENTOUT: 1 FMC_A5: 12 TIM20_CH2N: 2 PF6: EVENTOUT: 1 FMC_NIORD: 12 I2C2_SCL: 4 TIM4_CH4: 2 USART3_DE: 7 USART3_RTS: 7 PF7: EVENTOUT: 1 FMC_NREG: 12 TIM20_BKIN: 2 PF8: EVENTOUT: 1 FMC_NIOWR: 12 TIM20_BKIN2: 2 PF9: EVENTOUT: 1 FMC_CD: 12 SPI2_SCK: 5 TIM15_CH1: 3 TIM20_BKIN: 2 PG0: EVENTOUT: 1 FMC_A10: 12 TIM20_CH1N: 2 PG1: EVENTOUT: 1 FMC_A11: 12 TIM20_CH2N: 2 PG10: EVENTOUT: 1 FMC_NCE4_1: 12 FMC_NE3: 12 PG11: EVENTOUT: 1 FMC_NCE4_2: 12 PG12: EVENTOUT: 1 FMC_NE4: 12 PG13: EVENTOUT: 1 FMC_A24: 12 PG14: EVENTOUT: 1 FMC_A25: 12 PG15: EVENTOUT: 1 PG2: EVENTOUT: 1 FMC_A12: 12 TIM20_CH3N: 2 PG3: EVENTOUT: 1 FMC_A13: 12 TIM20_BKIN: 2 PG4: EVENTOUT: 1 FMC_A14: 12 TIM20_BKIN2: 2 PG5: EVENTOUT: 1 FMC_A15: 12 TIM20_ETR: 2 PG6: EVENTOUT: 1 FMC_INT2: 12 PG7: EVENTOUT: 1 FMC_INT3: 12 PG8: EVENTOUT: 1 PG9: EVENTOUT: 1 FMC_NCE3: 12 FMC_NE2: 12 PH0: EVENTOUT: 1 FMC_A0: 12 TIM20_CH1: 2 PH1: EVENTOUT: 1 FMC_A1: 12 TIM20_CH2: 2 PH2: EVENTOUT: 1