PA0: COMP1_OUT: 8 EVENTOUT: 15 TIM2_CH1: 1 TIM2_ETR: 14 TIM8_BKIN: 9 TIM8_ETR: 10 USART2_CTS: 7 USART2_NSS: 7 PA1: EVENTOUT: 15 RTC_REFIN: 0 TIM15_CH1N: 9 TIM2_CH2: 1 USART2_DE: 7 USART2_RTS: 7 PA10: CRS_SYNC: 3 EVENTOUT: 15 I2C2_SMBA: 4 SAI1_D1: 12 SAI1_SD_A: 14 SPI2_MISO: 5 TIM17_BKIN: 1 TIM1_CH3: 6 TIM2_CH4: 10 TIM8_BKIN: 11 USART1_RX: 7 PA11: COMP1_OUT: 8 EVENTOUT: 15 FDCAN1_RX: 9 I2S2_SD: 5 SPI2_MOSI: 5 TIM1_BKIN2: 12 TIM1_CH1N: 6 TIM1_CH4: 11 TIM4_CH1: 10 USART1_CTS: 7 USART1_NSS: 7 PA12: COMP2_OUT: 8 EVENTOUT: 15 FDCAN1_TX: 9 I2S_CKIN: 5 TIM16_CH1: 1 TIM1_CH2N: 6 TIM1_ETR: 11 TIM4_CH2: 10 USART1_DE: 7 USART1_RTS: 7 PA13: EVENTOUT: 15 I2C1_SCL: 4 IR_OUT: 5 SAI1_SD_B: 13 SYS_JTMS-SWDIO: 0 TIM16_CH1N: 1 TIM4_CH3: 10 USART3_CTS: 7 USART3_NSS: 7 PA14: EVENTOUT: 15 I2C1_SDA: 4 LPTIM1_OUT: 1 SAI1_FS_B: 13 SYS_JTCK-SWCLK: 0 TIM1_BKIN: 6 TIM8_CH2: 5 USART2_TX: 7 PA15: EVENTOUT: 15 I2C1_SCL: 4 I2S3_WS: 6 SPI1_NSS: 5 SPI3_NSS: 6 SYS_JTDI: 0 TIM1_BKIN: 9 TIM20_ETR: 3 TIM2_CH1: 1 TIM2_ETR: 14 TIM8_CH1: 2 UART4_DE: 8 UART4_RTS: 8 USART2_RX: 7 PA2: COMP2_OUT: 8 EVENTOUT: 15 LPUART1_TX: 12 QUADSPI1_BK1_NCS: 10 TIM15_CH1: 9 TIM2_CH3: 1 UCPD1_FRSTX1: 14 UCPD1_FRSTX2: 14 USART2_TX: 7 PA3: EVENTOUT: 15 LPUART1_RX: 12 QUADSPI1_CLK: 10 SAI1_CK1: 3 SAI1_MCLK_A: 13 TIM15_CH2: 9 TIM2_CH4: 1 USART2_RX: 7 PA4: EVENTOUT: 15 I2S3_WS: 6 SAI1_FS_B: 13 SPI1_NSS: 5 SPI3_NSS: 6 TIM3_CH2: 2 USART2_CK: 7 PA5: EVENTOUT: 15 SPI1_SCK: 5 TIM2_CH1: 1 TIM2_ETR: 2 UCPD1_FRSTX1: 14 UCPD1_FRSTX2: 14 PA6: COMP1_OUT: 8 EVENTOUT: 15 LPUART1_CTS: 12 QUADSPI1_BK1_IO3: 10 SPI1_MISO: 5 TIM16_CH1: 1 TIM1_BKIN: 6 TIM3_CH1: 2 TIM8_BKIN: 4 PA7: COMP2_OUT: 8 EVENTOUT: 15 QUADSPI1_BK1_IO2: 10 SPI1_MOSI: 5 TIM17_CH1: 1 TIM1_CH1N: 6 TIM3_CH2: 2 TIM8_CH1N: 4 UCPD1_FRSTX1: 14 UCPD1_FRSTX2: 14 PA8: EVENTOUT: 15 I2C2_SDA: 4 I2C3_SCL: 2 I2S2_MCK: 5 RCC_MCO: 0 SAI1_CK2: 12 SAI1_SCK_A: 14 TIM1_CH1: 6 TIM4_ETR: 10 USART1_CK: 7 PA9: EVENTOUT: 15 I2C2_SCL: 4 I2C3_SMBA: 2 I2S3_MCK: 5 SAI1_FS_A: 14 TIM15_BKIN: 9 TIM1_CH2: 6 TIM2_CH3: 10 USART1_TX: 7 PB0: EVENTOUT: 15 QUADSPI1_BK1_IO1: 10 TIM1_CH2N: 6 TIM3_CH3: 2 TIM8_CH2N: 4 UCPD1_FRSTX1: 14 UCPD1_FRSTX2: 14 PB1: COMP4_OUT: 8 EVENTOUT: 15 LPUART1_DE: 12 LPUART1_RTS: 12 QUADSPI1_BK1_IO0: 10 TIM1_CH3N: 6 TIM3_CH4: 2 TIM8_CH3N: 4 PB10: EVENTOUT: 15 LPUART1_RX: 8 QUADSPI1_CLK: 10 SAI1_SCK_A: 14 TIM1_BKIN: 12 TIM2_CH3: 1 USART3_TX: 7 PB11: EVENTOUT: 15 LPUART1_TX: 8 QUADSPI1_BK1_NCS: 10 TIM2_CH4: 1 USART3_RX: 7 PB12: EVENTOUT: 15 FDCAN2_RX: 9 I2C2_SMBA: 4 I2S2_WS: 5 LPUART1_DE: 8 LPUART1_RTS: 8 SPI2_NSS: 5 TIM1_BKIN: 6 USART3_CK: 7 PB13: EVENTOUT: 15 FDCAN2_TX: 9 I2S2_CK: 5 LPUART1_CTS: 8 SPI2_SCK: 5 TIM1_CH1N: 6 USART3_CTS: 7 USART3_NSS: 7 PB14: COMP4_OUT: 8 EVENTOUT: 15 SPI2_MISO: 5 TIM15_CH1: 1 TIM1_CH2N: 6 USART3_DE: 7 USART3_RTS: 7 PB15: COMP3_OUT: 3 EVENTOUT: 15 I2S2_SD: 5 RTC_REFIN: 0 SPI2_MOSI: 5 TIM15_CH1N: 2 TIM15_CH2: 1 TIM1_CH3N: 4 PB2: EVENTOUT: 15 I2C3_SMBA: 4 LPTIM1_OUT: 1 QUADSPI1_BK2_IO1: 10 RTC_OUT2: 0 TIM20_CH1: 3 PB3: CRS_SYNC: 3 EVENTOUT: 15 I2S3_CK: 6 SAI1_SCK_B: 14 SPI1_SCK: 5 SPI3_SCK: 6 SYS_JTDO-SWO: 0 TIM2_CH2: 1 TIM3_ETR: 10 TIM4_ETR: 2 TIM8_CH1N: 4 USART2_TX: 7 PB4: EVENTOUT: 15 SAI1_MCLK_B: 14 SPI1_MISO: 5 SPI3_MISO: 6 SYS_JTRST: 0 TIM16_CH1: 1 TIM17_BKIN: 10 TIM3_CH1: 2 TIM8_CH2N: 4 UART5_DE: 8 UART5_RTS: 8 USART2_RX: 7 PB5: EVENTOUT: 15 FDCAN2_RX: 9 I2C1_SMBA: 4 I2C3_SDA: 8 I2S3_SD: 6 LPTIM1_IN1: 11 SAI1_SD_B: 12 SPI1_MOSI: 5 SPI3_MOSI: 6 TIM16_BKIN: 1 TIM17_CH1: 10 TIM3_CH2: 2 TIM8_CH3N: 3 UART5_CTS: 14 USART2_CK: 7 PB6: COMP4_OUT: 8 EVENTOUT: 15 FDCAN2_TX: 9 LPTIM1_ETR: 11 SAI1_FS_B: 14 TIM16_CH1N: 1 TIM4_CH1: 2 TIM8_BKIN2: 10 TIM8_CH1: 5 TIM8_ETR: 6 USART1_TX: 7 PB7: COMP3_OUT: 8 EVENTOUT: 15 I2C1_SDA: 4 LPTIM1_IN2: 11 TIM17_CH1N: 1 TIM3_CH4: 10 TIM4_CH2: 2 TIM8_BKIN: 5 UART4_CTS: 14 USART1_RX: 7 PB8: COMP1_OUT: 8 EVENTOUT: 15 FDCAN1_RX: 9 I2C1_SCL: 4 SAI1_CK1: 3 SAI1_MCLK_A: 14 TIM16_CH1: 1 TIM1_BKIN: 12 TIM4_CH3: 2 TIM8_CH2: 10 USART3_RX: 7 PB9: COMP2_OUT: 8 EVENTOUT: 15 FDCAN1_TX: 9 I2C1_SDA: 4 IR_OUT: 6 SAI1_D2: 3 SAI1_FS_A: 14 TIM17_CH1: 1 TIM1_CH3N: 12 TIM4_CH4: 2 TIM8_CH3: 10 USART3_TX: 7 PC0: EVENTOUT: 15 LPTIM1_IN1: 1 LPUART1_RX: 8 TIM1_CH1: 2 PC1: EVENTOUT: 15 LPTIM1_OUT: 1 LPUART1_TX: 8 QUADSPI1_BK2_IO0: 10 SAI1_SD_A: 13 TIM1_CH2: 2 PC10: EVENTOUT: 15 I2S3_CK: 6 SPI3_SCK: 6 TIM8_CH1N: 4 UART4_TX: 5 USART3_TX: 7 PC11: EVENTOUT: 15 I2C3_SDA: 8 SPI3_MISO: 6 TIM8_CH2N: 4 UART4_RX: 5 USART3_RX: 7 PC12: EVENTOUT: 15 I2S3_SD: 6 SPI3_MOSI: 6 TIM8_CH3N: 4 UART5_TX: 5 UCPD1_FRSTX1: 14 UCPD1_FRSTX2: 14 USART3_CK: 7 PC13: EVENTOUT: 15 TIM1_BKIN: 2 TIM1_CH1N: 4 TIM8_CH4N: 6 PC14: EVENTOUT: 15 PC15: EVENTOUT: 15 PC2: COMP3_OUT: 3 EVENTOUT: 15 LPTIM1_IN2: 1 QUADSPI1_BK2_IO1: 10 TIM1_CH3: 2 TIM20_CH2: 6 PC3: EVENTOUT: 15 LPTIM1_ETR: 1 QUADSPI1_BK2_IO2: 10 SAI1_D1: 3 SAI1_SD_A: 13 TIM1_BKIN2: 6 TIM1_CH4: 2 PC4: EVENTOUT: 15 I2C2_SCL: 4 QUADSPI1_BK2_IO3: 10 TIM1_ETR: 2 USART1_TX: 7 PC5: EVENTOUT: 15 SAI1_D3: 3 TIM15_BKIN: 2 TIM1_CH4N: 6 USART1_RX: 7 PC6: EVENTOUT: 15 I2S2_MCK: 6 TIM3_CH1: 2 TIM8_CH1: 4 PC7: EVENTOUT: 15 I2S3_MCK: 6 TIM3_CH2: 2 TIM8_CH2: 4 PC8: EVENTOUT: 15 I2C3_SCL: 8 TIM20_CH3: 6 TIM3_CH3: 2 TIM8_CH3: 4 PC9: EVENTOUT: 15 I2C3_SDA: 8 I2S_CKIN: 5 TIM3_CH4: 2 TIM8_BKIN2: 6 TIM8_CH4: 4 PD0: EVENTOUT: 15 FDCAN1_RX: 9 TIM8_CH4N: 6 PD1: EVENTOUT: 15 FDCAN1_TX: 9 TIM8_BKIN2: 6 TIM8_CH4: 4 PD10: EVENTOUT: 15 USART3_CK: 7 PD11: EVENTOUT: 15 USART3_CTS: 7 USART3_NSS: 7 PD12: EVENTOUT: 15 TIM4_CH1: 2 USART3_DE: 7 USART3_RTS: 7 PD13: EVENTOUT: 15 TIM4_CH2: 2 PD14: EVENTOUT: 15 TIM4_CH3: 2 PD15: EVENTOUT: 15 SPI2_NSS: 6 TIM4_CH4: 2 PD2: EVENTOUT: 15 TIM3_ETR: 2 TIM8_BKIN: 4 UART5_RX: 5 PD3: EVENTOUT: 15 QUADSPI1_BK2_NCS: 10 TIM2_CH1: 2 TIM2_ETR: 2 USART2_CTS: 7 USART2_NSS: 7 PD4: EVENTOUT: 15 QUADSPI1_BK2_IO0: 10 TIM2_CH2: 2 USART2_DE: 7 USART2_RTS: 7 PD5: EVENTOUT: 15 QUADSPI1_BK2_IO1: 10 USART2_TX: 7 PD6: EVENTOUT: 15 QUADSPI1_BK2_IO2: 10 SAI1_D1: 3 SAI1_SD_A: 13 TIM2_CH4: 2 USART2_RX: 7 PD7: EVENTOUT: 15 QUADSPI1_BK2_IO3: 10 TIM2_CH3: 2 USART2_CK: 7 PD8: EVENTOUT: 15 USART3_TX: 7 PD9: EVENTOUT: 15 USART3_RX: 7 PE0: EVENTOUT: 15 TIM16_CH1: 4 TIM20_CH4N: 3 TIM20_ETR: 6 TIM4_ETR: 2 USART1_TX: 7 PE1: EVENTOUT: 15 TIM17_CH1: 4 TIM20_CH4: 6 USART1_RX: 7 PE10: EVENTOUT: 15 QUADSPI1_CLK: 10 SAI1_MCLK_B: 13 TIM1_CH2N: 2 PE11: EVENTOUT: 15 QUADSPI1_BK1_NCS: 10 TIM1_CH2: 2 PE12: EVENTOUT: 15 QUADSPI1_BK1_IO0: 10 TIM1_CH3N: 2 PE13: EVENTOUT: 15 QUADSPI1_BK1_IO1: 10 TIM1_CH3: 2 PE14: EVENTOUT: 15 QUADSPI1_BK1_IO2: 10 TIM1_BKIN2: 6 TIM1_CH4: 2 PE15: EVENTOUT: 15 QUADSPI1_BK1_IO3: 10 TIM1_BKIN: 2 TIM1_CH4N: 6 USART3_RX: 7 PE2: EVENTOUT: 15 SAI1_CK1: 3 SAI1_MCLK_A: 13 SYS_TRACECLK: 0 TIM20_CH1: 6 TIM3_CH1: 2 PE3: EVENTOUT: 15 SAI1_SD_B: 13 SYS_TRACED0: 0 TIM20_CH2: 6 TIM3_CH2: 2 PE4: EVENTOUT: 15 SAI1_D2: 3 SAI1_FS_A: 13 SYS_TRACED1: 0 TIM20_CH1N: 6 TIM3_CH3: 2 PE5: EVENTOUT: 15 SAI1_CK2: 3 SAI1_SCK_A: 13 SYS_TRACED2: 0 TIM20_CH2N: 6 TIM3_CH4: 2 PE6: EVENTOUT: 15 SAI1_D1: 3 SAI1_SD_A: 13 SYS_TRACED3: 0 TIM20_CH3N: 6 PE7: EVENTOUT: 15 SAI1_SD_B: 13 TIM1_ETR: 2 PE8: EVENTOUT: 15 SAI1_SCK_B: 13 TIM1_CH1N: 2 PE9: EVENTOUT: 15 SAI1_FS_B: 13 TIM1_CH1: 2 PF0: EVENTOUT: 15 I2C2_SDA: 4 I2S2_WS: 5 SPI2_NSS: 5 TIM1_CH3N: 6 PF1: EVENTOUT: 15 I2S2_CK: 5 SPI2_SCK: 5 PF10: EVENTOUT: 15 QUADSPI1_CLK: 10 SAI1_D3: 13 SPI2_SCK: 5 TIM15_CH2: 3 TIM20_BKIN2: 2 PF2: EVENTOUT: 15 I2C2_SMBA: 4 TIM20_CH3: 2 PF9: EVENTOUT: 15 QUADSPI1_BK1_IO1: 10 SAI1_FS_B: 13 SPI2_SCK: 5 TIM15_CH1: 3 TIM20_BKIN: 2 PG10: EVENTOUT: 15 RCC_MCO: 0 PI8: {}