block/FLASH: description: Flash items: - name: ACR description: Access control register byte_offset: 0 fieldset: ACR - name: PDKEYR description: Power down key register byte_offset: 4 access: Write - name: KEYR description: Flash key register byte_offset: 8 access: Write - name: OPTKEYR description: Option byte key register byte_offset: 12 access: Write - name: SR description: Status register byte_offset: 16 fieldset: SR - name: CR description: Flash control register byte_offset: 20 fieldset: CR - name: ECCR description: Flash ECC register byte_offset: 24 fieldset: ECCR - name: OPTR description: Flash option register byte_offset: 32 fieldset: OPTR - name: PCROP1SR description: Flash Bank 1 PCROP Start address register byte_offset: 36 fieldset: PCROP1SR - name: PCROP1ER description: Flash Bank 1 PCROP End address register byte_offset: 40 fieldset: PCROP1ER - name: WRP1AR description: Flash Bank 1 WRP area A address register byte_offset: 44 fieldset: WRP1AR - name: WRP1BR description: Flash Bank 1 WRP area B address register byte_offset: 48 fieldset: WRP1BR - name: SEC1R description: securable area bank1 register byte_offset: 112 fieldset: SEC1R fieldset/ACR: description: Access control register fields: - name: LATENCY description: Latency bit_offset: 0 bit_size: 4 enum: LATENCY - name: PRFTEN description: Prefetch enable bit_offset: 8 bit_size: 1 - name: ICEN description: Instruction cache enable bit_offset: 9 bit_size: 1 - name: DCEN description: Data cache enable bit_offset: 10 bit_size: 1 - name: ICRST description: Instruction cache reset bit_offset: 11 bit_size: 1 - name: DCRST description: Data cache reset bit_offset: 12 bit_size: 1 - name: RUN_PD description: Flash Power-down mode during Low-power run mode bit_offset: 13 bit_size: 1 - name: SLEEP_PD description: Flash Power-down mode during Low-power sleep mode bit_offset: 14 bit_size: 1 - name: DBG_SWEN description: Debug software enable bit_offset: 18 bit_size: 1 fieldset/CR: description: Flash control register fields: - name: PG description: Programming bit_offset: 0 bit_size: 1 - name: PER description: Page erase bit_offset: 1 bit_size: 1 - name: MER1 description: Bank 1 Mass erase bit_offset: 2 bit_size: 1 - name: PNB description: Page number bit_offset: 3 bit_size: 7 - name: STRT description: Start bit_offset: 16 bit_size: 1 - name: OPTSTRT description: Options modification start bit_offset: 17 bit_size: 1 - name: FSTPG description: Fast programming bit_offset: 18 bit_size: 1 - name: EOPIE description: End of operation interrupt enable bit_offset: 24 bit_size: 1 - name: ERRIE description: Error interrupt enable bit_offset: 25 bit_size: 1 - name: RDERRIE description: PCROP read error interrupt enable bit_offset: 26 bit_size: 1 - name: OBL_LAUNCH description: Force the option byte loading bit_offset: 27 bit_size: 1 - name: SEC_PROT1 description: Securable memory area protection enable bit_offset: 28 bit_size: 1 - name: OPTLOCK description: Options Lock bit_offset: 30 bit_size: 1 - name: LOCK description: FLASH_CR Lock bit_offset: 31 bit_size: 1 fieldset/ECCR: description: Flash ECC register fields: - name: ADDR_ECC description: ECC fail address bit_offset: 0 bit_size: 19 - name: BK_ECC description: ECC fail for Corrected ECC Error or Double ECC Error in info block bit_offset: 21 bit_size: 1 - name: SYSF_ECC description: ECC fail for Corrected ECC Error or Double ECC Error in info block bit_offset: 22 bit_size: 1 - name: ECCIE description: ECC correction interrupt enable bit_offset: 24 bit_size: 1 - name: ECCC2 description: ECC correction bit_offset: 28 bit_size: 1 - name: ECCD2 description: ECC2 detection bit_offset: 29 bit_size: 1 - name: ECCC description: ECC correction bit_offset: 30 bit_size: 1 - name: ECCD description: ECC detection bit_offset: 31 bit_size: 1 fieldset/OPTR: description: Flash option register fields: - name: RDP description: Read protection level bit_offset: 0 bit_size: 8 enum: RDP - name: BOR_LEV description: BOR reset Level bit_offset: 8 bit_size: 3 - name: nRST_STOP description: nRST_STOP bit_offset: 12 bit_size: 1 - name: nRST_STDBY description: nRST_STDBY bit_offset: 13 bit_size: 1 - name: nRST_SHDW description: nRST_SHDW bit_offset: 14 bit_size: 1 - name: IDWG_SW description: Independent watchdog selection bit_offset: 16 bit_size: 1 - name: IWDG_STOP description: Independent watchdog counter freeze in Stop mode bit_offset: 17 bit_size: 1 - name: IWDG_STDBY description: Independent watchdog counter freeze in Standby mode bit_offset: 18 bit_size: 1 - name: WWDG_SW description: Window watchdog selection bit_offset: 19 bit_size: 1 - name: PB4_PUPEN description: PB4 pull-up enable bit_offset: 22 bit_size: 1 - name: nBOOT1 description: Boot configuration bit_offset: 23 bit_size: 1 - name: SRAM2_PE description: SRAM2 parity check enable bit_offset: 24 bit_size: 1 - name: SRAM2_RST description: SRAM2 Erase when system reset bit_offset: 25 bit_size: 1 - name: nSWBOOT0 description: nSWBOOT0 bit_offset: 26 bit_size: 1 - name: nBOOT0 description: nBOOT0 option bit bit_offset: 27 bit_size: 1 - name: NRST_MODE description: NRST_MODE bit_offset: 28 bit_size: 2 enum: NRST_MODE - name: IRHEN description: Internal reset holder enable bit bit_offset: 30 bit_size: 1 fieldset/PCROP1ER: description: Flash Bank 1 PCROP End address register fields: - name: PCROP1_END description: Bank 1 PCROP area end offset bit_offset: 0 bit_size: 15 - name: PCROP_RDP description: PCROP area preserved when RDP level decreased bit_offset: 31 bit_size: 1 fieldset/PCROP1SR: description: Flash Bank 1 PCROP Start address register fields: - name: PCROP1_STRT description: Bank 1 PCROP area start offset bit_offset: 0 bit_size: 15 fieldset/SEC1R: description: securable area bank1 register fields: - name: SEC_SIZE1 description: SEC_SIZE1 bit_offset: 0 bit_size: 8 - name: BOOT_LOCK description: used to force boot from user area bit_offset: 16 bit_size: 1 fieldset/SR: description: Status register fields: - name: EOP description: End of operation bit_offset: 0 bit_size: 1 - name: OPERR description: Operation error bit_offset: 1 bit_size: 1 - name: PROGERR description: Programming error bit_offset: 3 bit_size: 1 - name: WRPERR description: Write protected error bit_offset: 4 bit_size: 1 - name: PGAERR description: Programming alignment error bit_offset: 5 bit_size: 1 - name: SIZERR description: Size error bit_offset: 6 bit_size: 1 - name: PGSERR description: Programming sequence error bit_offset: 7 bit_size: 1 - name: MISERR description: Fast programming data miss error bit_offset: 8 bit_size: 1 - name: FASTERR description: Fast programming error bit_offset: 9 bit_size: 1 - name: RDERR description: PCROP read error bit_offset: 14 bit_size: 1 - name: OPTVERR description: Option validity error bit_offset: 15 bit_size: 1 - name: BSY description: Busy bit_offset: 16 bit_size: 1 fieldset/WRP1AR: description: Flash Bank 1 WRP area A address register fields: - name: WRP1A_STRT description: Bank 1 WRP first area start offset bit_offset: 0 bit_size: 7 - name: WRP1A_END description: Bank 1 WRP first area A end offset bit_offset: 16 bit_size: 7 fieldset/WRP1BR: description: Flash Bank 1 WRP area B address register fields: - name: WRP1B_STRT description: Bank 1 WRP second area B end offset bit_offset: 0 bit_size: 7 - name: WRP1B_END description: Bank 1 WRP second area B start offset bit_offset: 16 bit_size: 7 enum/LATENCY: bit_size: 4 variants: - name: WS0 description: Zero wait states value: 0 - name: WS1 description: One wait state value: 1 - name: WS2 description: Two wait states value: 2 - name: WS3 description: Three wait states value: 3 - name: WS4 description: Four wait states value: 4 enum/NRST_MODE: bit_size: 2 variants: - name: INPUT_ONLY description: Reset pin is in reset input mode only value: 1 - name: GPIO description: Reset pin is in GPIO mode only value: 2 - name: INPUT_OUTPUT description: Reset pin is in reset input and output mode value: 3 enum/RDP: bit_size: 8 variants: - name: LEVEL_0 description: Read protection not active value: 170 - name: LEVEL_1 description: Memories read protection active value: 187 - name: LEVEL_2 description: Chip read protection active value: 204