--- block/DBG: description: Debug support items: - name: IDCODE description: MCU Device ID Code Register byte_offset: 0 access: Read fieldset: IDCODE - name: CR description: Debug MCU Configuration Register byte_offset: 4 fieldset: CR - name: APB1_FZ description: APB Low Freeze Register byte_offset: 8 fieldset: APB1_FZ - name: APB2_FZ description: APB High Freeze Register byte_offset: 12 fieldset: APB2_FZ fieldset/APB1_FZ: description: APB Low Freeze Register fields: - name: DBG_TIMER2_STOP description: Debug Timer 2 stopped when Core is halted bit_offset: 0 bit_size: 1 enum: DBG_TIMER_STOP - name: DBG_TIMER6_STOP description: Debug Timer 6 stopped when Core is halted bit_offset: 4 bit_size: 1 enum: DBG_TIMER_STOP - name: DBG_RTC_STOP description: Debug RTC stopped when Core is halted bit_offset: 10 bit_size: 1 enum: DBG_RTC_STOP - name: DBG_WWDG_STOP description: Debug Window Wachdog stopped when Core is halted bit_offset: 11 bit_size: 1 enum: DBG_WWDG_STOP - name: DBG_IWDG_STOP description: Debug Independent Wachdog stopped when Core is halted bit_offset: 12 bit_size: 1 enum: DBG_IWDG_STOP - name: DBG_I2C1_STOP description: I2C1 SMBUS timeout mode stopped when core is halted bit_offset: 21 bit_size: 1 enum: DBG_IC_STOP - name: DBG_I2C2_STOP description: I2C2 SMBUS timeout mode stopped when core is halted bit_offset: 22 bit_size: 1 enum: DBG_IC_STOP - name: DBG_LPTIMER_STOP description: LPTIM1 counter stopped when core is halted bit_offset: 31 bit_size: 1 enum: DBG_LPTIMER_STOP fieldset/APB2_FZ: description: APB High Freeze Register fields: - name: DBG_TIMER21_STOP description: Debug Timer 21 stopped when Core is halted bit_offset: 2 bit_size: 1 enum: DBG_TIMER_STOP - name: DBG_TIMER22_STO description: Debug Timer 22 stopped when Core is halted bit_offset: 6 bit_size: 1 fieldset/CR: description: Debug MCU Configuration Register fields: - name: DBG_SLEEP description: Debug Sleep Mode bit_offset: 0 bit_size: 1 enum: DBG_SLEEP - name: DBG_STOP description: Debug Stop Mode bit_offset: 1 bit_size: 1 enum: DBG_STOP - name: DBG_STANDBY description: Debug Standby Mode bit_offset: 2 bit_size: 1 enum: DBG_STANDBY fieldset/IDCODE: description: MCU Device ID Code Register fields: - name: DEV_ID description: Device Identifier bit_offset: 0 bit_size: 12 - name: REV_ID description: Revision Identifier bit_offset: 16 bit_size: 16 enum/DBG_IC_STOP: bit_size: 1 variants: - name: NormalMode description: Same behavior as in normal mode value: 0 - name: SMBusTimeoutFrozen description: I2C3 SMBUS timeout is frozen value: 1 enum/DBG_IWDG_STOP: bit_size: 1 variants: - name: Continue description: The independent watchdog counter clock continues even if the core is halted value: 0 - name: Stop description: The independent watchdog counter clock is stopped when the core is halted value: 1 enum/DBG_LPTIMER_STOP: bit_size: 1 variants: - name: Continue description: LPTIM1 counter clock is fed even if the core is halted value: 0 - name: Stop description: LPTIM1 counter clock is stopped when the core is halted value: 1 enum/DBG_RTC_STOP: bit_size: 1 variants: - name: Continue description: The clock of the RTC counter is fed even if the core is halted value: 0 - name: Stop description: The clock of the RTC counter is stopped when the core is halted value: 1 enum/DBG_SLEEP: bit_size: 1 variants: - name: Disabled description: Debug Sleep Mode Disabled value: 0 - name: Enabled description: Debug Sleep Mode Enabled value: 1 enum/DBG_STANDBY: bit_size: 1 variants: - name: Disabled description: Debug Standby Mode Disabled value: 0 - name: Enabled description: Debug Standby Mode Enabled value: 1 enum/DBG_STOP: bit_size: 1 variants: - name: Disabled description: Debug Stop Mode Disabled value: 0 - name: Enabled description: Debug Stop Mode Enabled value: 1 enum/DBG_TIMER_STOP: bit_size: 1 variants: - name: Continue description: The counter clock of TIMx is fed even if the core is halted value: 0 - name: Stop description: The counter clock of TIMx is stopped when the core is halted value: 1 enum/DBG_WWDG_STOP: bit_size: 1 variants: - name: Continue description: The window watchdog counter clock continues even if the core is halted value: 0 - name: Stop description: The window watchdog counter clock is stopped when the core is halted value: 1