--- block/LCD: description: Liquid crystal display controller items: - name: CR description: control register byte_offset: 0 fieldset: CR - name: FCR description: frame control register byte_offset: 4 fieldset: FCR - name: SR description: status register byte_offset: 8 fieldset: SR - name: CLR description: clear register byte_offset: 12 access: Write fieldset: CLR - name: RAM_COM0 description: display memory byte_offset: 20 - name: RAM_COM1 description: display memory byte_offset: 28 - name: RAM_COM2 description: display memory byte_offset: 36 - name: RAM_COM3 description: display memory byte_offset: 44 - name: RAM_COM4 description: display memory byte_offset: 52 - name: RAM_COM5 description: display memory byte_offset: 60 - name: RAM_COM6 description: display memory byte_offset: 68 - name: RAM_COM7 description: display memory byte_offset: 76 fieldset/CLR: description: clear register fields: - name: SOFC description: Start of frame flag clear bit_offset: 1 bit_size: 1 - name: UDDC description: Update display done clear bit_offset: 3 bit_size: 1 fieldset/CR: description: control register fields: - name: LCDEN description: LCD controller enable bit_offset: 0 bit_size: 1 - name: VSEL description: Voltage source selection bit_offset: 1 bit_size: 1 - name: DUTY description: Duty selection bit_offset: 2 bit_size: 3 - name: BIAS description: Bias selector bit_offset: 5 bit_size: 2 - name: MUX_SEG description: Mux segment enable bit_offset: 7 bit_size: 1 - name: BUFEN description: Voltage output buffer enable bit_offset: 8 bit_size: 1 fieldset/FCR: description: frame control register fields: - name: HD description: High drive enable bit_offset: 0 bit_size: 1 - name: SOFIE description: Start of frame interrupt enable bit_offset: 1 bit_size: 1 - name: UDDIE description: Update display done interrupt enable bit_offset: 3 bit_size: 1 - name: PON description: Pulse ON duration bit_offset: 4 bit_size: 3 - name: DEAD description: Dead time duration bit_offset: 7 bit_size: 3 - name: CC description: Contrast control bit_offset: 10 bit_size: 3 - name: BLINKF description: Blink frequency selection bit_offset: 13 bit_size: 3 - name: BLINK description: Blink mode selection bit_offset: 16 bit_size: 2 - name: DIV description: DIV clock divider bit_offset: 18 bit_size: 4 - name: PS description: PS 16-bit prescaler bit_offset: 22 bit_size: 4 fieldset/SR: description: status register fields: - name: ENS description: LCD enabled status bit_offset: 0 bit_size: 1 - name: SOF description: Start of frame flag bit_offset: 1 bit_size: 1 - name: UDR description: Update display request bit_offset: 2 bit_size: 1 - name: UDD description: Update Display Done bit_offset: 3 bit_size: 1 - name: RDY description: Ready flag bit_offset: 4 bit_size: 1 - name: FCRSF description: LCD Frame Control Register Synchronization flag bit_offset: 5 bit_size: 1