block/DBGMCU: description: Microcontroller debug unit. items: - name: IDCODE description: DBGMCU identity code register. byte_offset: 0 fieldset: IDCODE - name: CR description: DBGMCU configuration register. byte_offset: 4 fieldset: CR - name: APB1LFZR description: DBGMCU APB1L peripheral freeze register. byte_offset: 8 fieldset: APB1LFZR - name: APB1HFZR description: DBGMCU APB1H peripheral freeze register. byte_offset: 12 fieldset: APB1HFZR - name: APB2FZR description: DBGMCU APB2 peripheral freeze register. byte_offset: 16 fieldset: APB2FZR - name: APB3FZR description: DBGMCU APB3 peripheral freeze register. byte_offset: 20 fieldset: APB3FZR - name: AHB1FZR description: DBGMCU AHB1 peripheral freeze register. byte_offset: 32 fieldset: AHB1FZR - name: SR description: DBGMCU status register. byte_offset: 252 fieldset: SR - name: AUTH_HOST description: DBGMCU debug authentication mailbox host register. byte_offset: 256 - name: AUTH_DEVICE description: DBGMCU debug authentication mailbox device register. byte_offset: 260 - name: AUTH_ACK description: DBGMCU debug authentication mailbox acknowledge register. byte_offset: 264 fieldset: AUTH_ACK - name: PIDR4 description: DBGMCU CoreSight peripheral identity register 4. byte_offset: 4048 fieldset: PIDR4 - name: PIDR0 description: DBGMCU CoreSight peripheral identity register 0. byte_offset: 4064 fieldset: PIDR0 - name: PIDR1 description: DBGMCU CoreSight peripheral identity register 1. byte_offset: 4068 fieldset: PIDR1 - name: PIDR2 description: DBGMCU CoreSight peripheral identity register 2. byte_offset: 4072 fieldset: PIDR2 - name: PIDR3 description: DBGMCU CoreSight peripheral identity register 3. byte_offset: 4076 fieldset: PIDR3 - name: CIDR0 description: DBGMCU CoreSight component identity register 0. byte_offset: 4080 fieldset: CIDR0 - name: CIDR1 description: DBGMCU CoreSight component identity register 1. byte_offset: 4084 fieldset: CIDR1 - name: CIDR2 description: DBGMCU CoreSight component identity register 2. byte_offset: 4088 fieldset: CIDR2 - name: CIDR3 description: DBGMCU CoreSight component identity register 3. byte_offset: 4092 fieldset: CIDR3 fieldset/AHB1FZR: description: DBGMCU AHB1 peripheral freeze register. fields: - name: GPDMA1_STOP description: GPDMA1 channel 0 stop in debug. bit_offset: 0 bit_size: 1 array: len: 16 stride: 1 - name: GPDMA2_STOP description: GPDMA2 channel 0 stop in debug. bit_offset: 16 bit_size: 1 array: len: 16 stride: 1 fieldset/APB1HFZR: description: DBGMCU APB1H peripheral freeze register. fields: - name: LPTIM2_STOP description: LPTIM2 stop in debug. bit_offset: 5 bit_size: 1 fieldset/APB1LFZR: description: DBGMCU APB1L peripheral freeze register. fields: - name: TIM2_STOP description: TIM2 stop in debug. bit_offset: 0 bit_size: 1 - name: TIM3_STOP description: TIM3 stop in debug. bit_offset: 1 bit_size: 1 - name: TIM4_STOP description: TIM4 stop in debug. bit_offset: 2 bit_size: 1 - name: TIM5_STOP description: TIM5 stop in debug. bit_offset: 3 bit_size: 1 - name: TIM6_STOP description: TIM6 stop in debug. bit_offset: 4 bit_size: 1 - name: TIM7_STOP description: TIM7 stop in debug. bit_offset: 5 bit_size: 1 - name: TIM12_STOP description: TIM12 stop in debug. bit_offset: 6 bit_size: 1 - name: TIM13_STOP description: TIM13 stop in debug. bit_offset: 7 bit_size: 1 - name: TIM14_STOP description: TIM14 stop in debug. bit_offset: 8 bit_size: 1 - name: WWDG_STOP description: WWDG stop in debug. bit_offset: 11 bit_size: 1 - name: IWDG_STOP description: IWDG stop in debug. bit_offset: 12 bit_size: 1 - name: I2C1_STOP description: I2C1 SMBUS timeout stop in debug. bit_offset: 21 bit_size: 1 - name: I2C2_STOP description: I2C2 SMBUS timeout stop in debug. bit_offset: 22 bit_size: 1 - name: I3C1_STOP description: I3C1 SCL stall counter stop in debug. bit_offset: 23 bit_size: 1 fieldset/APB2FZR: description: DBGMCU APB2 peripheral freeze register. fields: - name: TIM1_STOP description: TIM1 stop in debug. bit_offset: 11 bit_size: 1 - name: TIM8_STOP description: TIM8 stop in debug. bit_offset: 13 bit_size: 1 - name: TIM15_STOP description: TIM15 stop in debug. bit_offset: 16 bit_size: 1 - name: TIM16_STOP description: TIM16 stop in debug. bit_offset: 17 bit_size: 1 - name: TIM17_STOP description: TIM17 stop in debug. bit_offset: 18 bit_size: 1 fieldset/APB3FZR: description: DBGMCU APB3 peripheral freeze register. fields: - name: I2C3_STOP description: I2C3 SMBUS timeout stop in debug. bit_offset: 10 bit_size: 1 - name: I2C4_STOP description: I2C4 SMBUS timeout stop in debug. bit_offset: 11 bit_size: 1 - name: LPTIM1_STOP description: LPTIM1 stop in debug. bit_offset: 17 bit_size: 1 - name: LPTIM3_STOP description: LPTIM3 stop in debug. bit_offset: 18 bit_size: 1 - name: LPTIM4_STOP description: LPTIM4 stop in debug. bit_offset: 19 bit_size: 1 - name: LPTIM5_STOP description: LPTIM5 stop in debug. bit_offset: 20 bit_size: 1 - name: LPTIM6_STOP description: LPTIM6 stop in debug. bit_offset: 21 bit_size: 1 - name: RTC_STOP description: RTC stop in debug. bit_offset: 30 bit_size: 1 fieldset/AUTH_ACK: description: DBGMCU debug authentication mailbox acknowledge register. fields: - name: HOST_ACK description: Host to device acknowledge. The device sets this bit to indicate that it has placed a message in the DBGMCU_DBG_AUTH_DEVICE register. It should be reset by the host after reading the message. bit_offset: 0 bit_size: 1 - name: DEV_ACK description: Device to device acknowledge. The host sets this bit to indicate that it has placed a message in the DBGMCU_DBG_AUTH_HOST register. It is reset by the device after reading the message. bit_offset: 1 bit_size: 1 fieldset/CIDR0: description: DBGMCU CoreSight component identity register 0. fields: - name: PREAMBLE description: component identification bits [7:0]. bit_offset: 0 bit_size: 8 fieldset/CIDR1: description: DBGMCU CoreSight component identity register 1. fields: - name: PREAMBLE description: component identification bits [11:8]. bit_offset: 0 bit_size: 4 - name: CLASS description: component identification bits [15:12] - component class. bit_offset: 4 bit_size: 4 fieldset/CIDR2: description: DBGMCU CoreSight component identity register 2. fields: - name: PREAMBLE description: component identification bits [23:16]. bit_offset: 0 bit_size: 8 fieldset/CIDR3: description: DBGMCU CoreSight component identity register 3. fields: - name: PREAMBLE description: component identification bits [31:24]. bit_offset: 0 bit_size: 8 fieldset/CR: description: DBGMCU configuration register. fields: - name: STOP description: Allows debug in Stop mode All clocks are disabled automatically in Stop mode. All active clocks and oscillators continue to run during Stop mode, allowing full debug capability. On exit from Stop mode, the clock settings are set to the Stop mode exit state. bit_offset: 1 bit_size: 1 - name: STANDBY description: Allows debug in Standby mode All clocks are disabled and the core powered down automatically in Standby mode. All active clocks and oscillators continue to run during Standby mode, and the core supply is maintained, allowing full debug capability. On exit from Standby mode, a system reset is performed. bit_offset: 2 bit_size: 1 - name: TRACE_IOEN description: trace pin enable. bit_offset: 4 bit_size: 1 - name: TRACE_EN description: trace port and clock enable. This bit enables the trace port clock, TRACECK. bit_offset: 5 bit_size: 1 - name: TRACE_MODE description: trace pin assignment. bit_offset: 6 bit_size: 2 - name: DCRT description: Debug credentials reset type This bit selects which type of reset is used to revoke the debug authentication credentials. bit_offset: 16 bit_size: 1 fieldset/IDCODE: description: DBGMCU identity code register. fields: - name: DEV_ID description: device identification. bit_offset: 0 bit_size: 12 - name: REV_ID description: revision. bit_offset: 16 bit_size: 16 fieldset/PIDR0: description: DBGMCU CoreSight peripheral identity register 0. fields: - name: PARTNUM description: part number bits [7:0]. bit_offset: 0 bit_size: 8 fieldset/PIDR1: description: DBGMCU CoreSight peripheral identity register 1. fields: - name: PARTNUM description: part number bits [11:8]. bit_offset: 0 bit_size: 4 - name: JEP106ID description: JEP106 identity code bits [3:0]. bit_offset: 4 bit_size: 4 fieldset/PIDR2: description: DBGMCU CoreSight peripheral identity register 2. fields: - name: JEP106ID description: JEP106 identity code bits [6:4]. bit_offset: 0 bit_size: 3 - name: JEDEC description: JEDEC assigned value. bit_offset: 3 bit_size: 1 - name: REVISION description: component revision number. bit_offset: 4 bit_size: 4 fieldset/PIDR3: description: DBGMCU CoreSight peripheral identity register 3. fields: - name: CMOD description: customer modified. bit_offset: 0 bit_size: 4 - name: REVAND description: metal fix version. bit_offset: 4 bit_size: 4 fieldset/PIDR4: description: DBGMCU CoreSight peripheral identity register 4. fields: - name: JEP106CON description: JEP106 continuation code. bit_offset: 0 bit_size: 4 - name: SIZE description: register file size. bit_offset: 4 bit_size: 4 fieldset/SR: description: DBGMCU status register. fields: - name: AP_PRESENT description: 'Bit n identifies whether access port AP n is present in device Bit n = 0: APn absent Bit n = 1: APn present.' bit_offset: 0 bit_size: 16 - name: AP_ENABLED description: 'Bit n identifies whether access port AP n is open (can be accessed via the debug port) or locked (debug access to the AP is blocked) Bit n = 0: APn locked Bit n = 1: APn enabled.' bit_offset: 16 bit_size: 16