--- block/ADC: description: Analog to Digital Converter items: - name: ISR description: ADC interrupt and status register byte_offset: 0 fieldset: ISR - name: IER description: ADC interrupt enable register byte_offset: 4 fieldset: IER - name: CR description: ADC control register byte_offset: 8 fieldset: CR - name: CFGR1 description: ADC configuration register 1 byte_offset: 12 fieldset: CFGR1 - name: CFGR2 description: ADC configuration register 2 byte_offset: 16 fieldset: CFGR2 - name: SMPR description: ADC sampling time register byte_offset: 20 fieldset: SMPR - name: AWD1TR description: watchdog threshold register byte_offset: 32 fieldset: AWD1TR - name: AWD2TR description: watchdog threshold register byte_offset: 36 fieldset: AWD2TR - name: CHSELR description: channel selection register byte_offset: 40 fieldset: CHSELR - name: CHSELR_1 description: channel selection register CHSELRMOD = 1 in ADC_CFGR1 byte_offset: 40 fieldset: CHSELR_1 - name: AWD3TR description: watchdog threshold register byte_offset: 44 fieldset: AWD3TR - name: DR description: ADC group regular conversion data register byte_offset: 64 access: Read fieldset: DR - name: AWD2CR description: ADC analog watchdog 2 configuration register byte_offset: 160 fieldset: AWD2CR - name: AWD3CR description: ADC analog watchdog 3 configuration register byte_offset: 164 fieldset: AWD3CR - name: CALFACT description: ADC calibration factors register byte_offset: 180 fieldset: CALFACT - name: CCR description: ADC common control register byte_offset: 776 fieldset: CCR - name: HWCFGR6 description: Hardware Configuration Register byte_offset: 984 fieldset: HWCFGR6 - name: HWCFGR5 description: Hardware Configuration Register byte_offset: 988 fieldset: HWCFGR5 - name: HWCFGR4 description: Hardware Configuration Register byte_offset: 992 fieldset: HWCFGR4 - name: HWCFGR3 description: Hardware Configuration Register byte_offset: 996 fieldset: HWCFGR3 - name: HWCFGR2 description: Hardware Configuration Register byte_offset: 1000 fieldset: HWCFGR2 - name: HWCFGR1 description: Hardware Configuration Register byte_offset: 1004 fieldset: HWCFGR1 - name: HWCFGR0 description: Hardware Configuration Register byte_offset: 1008 access: Read fieldset: HWCFGR0 - name: VERR description: EXTI IP Version register byte_offset: 1012 access: Read fieldset: VERR - name: IPIDR description: EXTI Identification register byte_offset: 1016 access: Read fieldset: IPIDR - name: SIDR description: EXTI Size ID register byte_offset: 1020 access: Read fieldset: SIDR fieldset/AWD1TR: description: watchdog threshold register fields: - name: LT1 description: ADC analog watchdog 1 threshold low bit_offset: 0 bit_size: 12 - name: HT1 description: ADC analog watchdog 1 threshold high bit_offset: 16 bit_size: 12 fieldset/AWD2CR: description: ADC analog watchdog 2 configuration register fields: - name: AWD2CH description: ADC analog watchdog 2 monitored channel selection bit_offset: 0 bit_size: 19 fieldset/AWD2TR: description: watchdog threshold register fields: - name: LT2 description: ADC analog watchdog 2 threshold low bit_offset: 0 bit_size: 12 - name: HT2 description: ADC analog watchdog 2 threshold high bit_offset: 16 bit_size: 12 fieldset/AWD3CR: description: ADC analog watchdog 3 configuration register fields: - name: AWD3CH description: ADC analog watchdog 3 monitored channel selection bit_offset: 0 bit_size: 19 fieldset/AWD3TR: description: watchdog threshold register fields: - name: LT3 description: ADC analog watchdog 3 threshold high bit_offset: 0 bit_size: 12 - name: HT3 description: ADC analog watchdog 3 threshold high bit_offset: 16 bit_size: 12 fieldset/CALFACT: description: ADC calibration factors register fields: - name: CALFACT description: ADC calibration factor in single-ended mode bit_offset: 0 bit_size: 7 fieldset/CCR: description: ADC common control register fields: - name: PRESC description: ADC prescaler bit_offset: 18 bit_size: 4 - name: VREFEN description: VREFINT enable bit_offset: 22 bit_size: 1 - name: TSEN description: Temperature sensor enable bit_offset: 23 bit_size: 1 - name: VBATEN description: VBAT enable bit_offset: 24 bit_size: 1 fieldset/CFGR1: description: ADC configuration register 1 fields: - name: DMAEN description: ADC DMA transfer enable bit_offset: 0 bit_size: 1 - name: DMACFG description: ADC DMA transfer configuration bit_offset: 1 bit_size: 1 - name: SCANDIR description: Scan sequence direction bit_offset: 2 bit_size: 1 - name: RES description: ADC data resolution bit_offset: 3 bit_size: 2 enum: RES - name: ALIGN description: ADC data alignement bit_offset: 5 bit_size: 1 - name: EXTSEL description: ADC group regular external trigger source bit_offset: 6 bit_size: 3 - name: EXTEN description: ADC group regular external trigger polarity bit_offset: 10 bit_size: 2 - name: OVRMOD description: ADC group regular overrun configuration bit_offset: 12 bit_size: 1 - name: CONT description: ADC group regular continuous conversion mode bit_offset: 13 bit_size: 1 - name: WAIT description: Wait conversion mode bit_offset: 14 bit_size: 1 - name: AUTOFF description: Auto-off mode bit_offset: 15 bit_size: 1 - name: DISCEN description: ADC group regular sequencer discontinuous mode bit_offset: 16 bit_size: 1 - name: CHSELRMOD description: Mode selection of the ADC_CHSELR register bit_offset: 21 bit_size: 1 - name: AWD1SGL description: ADC analog watchdog 1 monitoring a single channel or all channels bit_offset: 22 bit_size: 1 - name: AWD1EN description: ADC analog watchdog 1 enable on scope ADC group regular bit_offset: 23 bit_size: 1 - name: AWDCH1CH description: ADC analog watchdog 1 monitored channel selection bit_offset: 26 bit_size: 5 fieldset/CFGR2: description: ADC configuration register 2 fields: - name: OVSE description: ADC oversampler enable on scope ADC group regular bit_offset: 0 bit_size: 1 - name: OVSR description: ADC oversampling ratio bit_offset: 2 bit_size: 3 - name: OVSS description: ADC oversampling shift bit_offset: 5 bit_size: 4 - name: TOVS description: ADC oversampling discontinuous mode (triggered mode) for ADC group regular bit_offset: 9 bit_size: 1 - name: LFTRIG description: Low frequency trigger mode enable bit_offset: 29 bit_size: 1 - name: CKMODE description: ADC clock mode bit_offset: 30 bit_size: 2 fieldset/CHSELR: description: channel selection register fields: - name: CHSEL description: Channel-x selection bit_offset: 0 bit_size: 19 fieldset/CHSELR_1: description: channel selection register CHSELRMOD = 1 in ADC_CFGR1 fields: - name: SQ1 description: conversion of the sequence bit_offset: 0 bit_size: 4 - name: SQ2 description: conversion of the sequence bit_offset: 4 bit_size: 4 - name: SQ3 description: conversion of the sequence bit_offset: 8 bit_size: 4 - name: SQ4 description: conversion of the sequence bit_offset: 12 bit_size: 4 - name: SQ5 description: conversion of the sequence bit_offset: 16 bit_size: 4 - name: SQ6 description: conversion of the sequence bit_offset: 20 bit_size: 4 - name: SQ7 description: conversion of the sequence bit_offset: 24 bit_size: 4 - name: SQ8 description: conversion of the sequence bit_offset: 28 bit_size: 4 fieldset/CR: description: ADC control register fields: - name: ADEN description: ADC enable bit_offset: 0 bit_size: 1 - name: ADDIS description: ADC disable bit_offset: 1 bit_size: 1 - name: ADSTART description: ADC group regular conversion start bit_offset: 2 bit_size: 1 - name: ADSTP description: ADC group regular conversion stop bit_offset: 4 bit_size: 1 - name: ADVREGEN description: ADC voltage regulator enable bit_offset: 28 bit_size: 1 - name: ADCAL description: ADC calibration bit_offset: 31 bit_size: 1 fieldset/DR: description: ADC group regular conversion data register fields: - name: regularDATA description: ADC group regular conversion data bit_offset: 0 bit_size: 16 fieldset/HWCFGR0: description: Hardware Configuration Register fields: - name: NUM_CHAN_24 description: NUM_CHAN_24 bit_offset: 0 bit_size: 4 - name: EXTRA_AWDS description: Extra analog watchdog bit_offset: 4 bit_size: 4 - name: OVS description: Oversampling bit_offset: 8 bit_size: 4 fieldset/HWCFGR1: description: Hardware Configuration Register fields: - name: CHMAP3 description: Input channel mapping bit_offset: 0 bit_size: 5 - name: CHMAP2 description: Input channel mapping bit_offset: 8 bit_size: 5 - name: CHMAP1 description: Input channel mapping bit_offset: 16 bit_size: 5 - name: CHMAP0 description: Input channel mapping bit_offset: 24 bit_size: 5 fieldset/HWCFGR2: description: Hardware Configuration Register fields: - name: CHMAP7 description: Input channel mapping bit_offset: 0 bit_size: 5 - name: CHMAP6 description: Input channel mapping bit_offset: 8 bit_size: 5 - name: CHMAP5 description: Input channel mapping bit_offset: 16 bit_size: 5 - name: CHMAP4 description: Input channel mapping bit_offset: 24 bit_size: 5 fieldset/HWCFGR3: description: Hardware Configuration Register fields: - name: CHMAP11 description: Input channel mapping bit_offset: 0 bit_size: 5 - name: CHMAP10 description: Input channel mapping bit_offset: 8 bit_size: 5 - name: CHMAP9 description: Input channel mapping bit_offset: 16 bit_size: 5 - name: CHMAP8 description: Input channel mapping bit_offset: 24 bit_size: 5 fieldset/HWCFGR4: description: Hardware Configuration Register fields: - name: CHMAP15 description: Input channel mapping bit_offset: 0 bit_size: 5 - name: CHMAP14 description: Input channel mapping bit_offset: 8 bit_size: 5 - name: CHMAP13 description: Input channel mapping bit_offset: 16 bit_size: 5 - name: CHMAP12 description: Input channel mapping bit_offset: 24 bit_size: 5 fieldset/HWCFGR5: description: Hardware Configuration Register fields: - name: CHMAP19 description: Input channel mapping bit_offset: 0 bit_size: 5 - name: CHMAP18 description: Input channel mapping bit_offset: 8 bit_size: 5 - name: CHMAP17 description: Input channel mapping bit_offset: 16 bit_size: 5 - name: CHMAP16 description: Input channel mapping bit_offset: 24 bit_size: 5 fieldset/HWCFGR6: description: Hardware Configuration Register fields: - name: CHMAP20 description: Input channel mapping bit_offset: 0 bit_size: 5 - name: CHMAP21 description: Input channel mapping bit_offset: 8 bit_size: 5 - name: CHMAP22 description: Input channel mapping bit_offset: 16 bit_size: 5 - name: CHMAP23 description: Input channel mapping bit_offset: 24 bit_size: 5 fieldset/IER: description: ADC interrupt enable register fields: - name: ADRDYIE description: ADC ready interrupt bit_offset: 0 bit_size: 1 - name: EOSMPIE description: ADC group regular end of sampling interrupt bit_offset: 1 bit_size: 1 - name: EOCIE description: ADC group regular end of unitary conversion interrupt bit_offset: 2 bit_size: 1 - name: EOSIE description: ADC group regular end of sequence conversions interrupt bit_offset: 3 bit_size: 1 - name: OVRIE description: ADC group regular overrun interrupt bit_offset: 4 bit_size: 1 - name: AWD1IE description: ADC analog watchdog 1 interrupt bit_offset: 7 bit_size: 1 - name: AWD2IE description: ADC analog watchdog 2 interrupt bit_offset: 8 bit_size: 1 - name: AWD3IE description: ADC analog watchdog 3 interrupt bit_offset: 9 bit_size: 1 - name: EOCALIE description: End of calibration interrupt enable bit_offset: 11 bit_size: 1 - name: CCRDYIE description: Channel Configuration Ready Interrupt enable bit_offset: 13 bit_size: 1 fieldset/IPIDR: description: EXTI Identification register fields: - name: IPID description: IP Identification bit_offset: 0 bit_size: 32 fieldset/ISR: description: ADC interrupt and status register fields: - name: ADRDY description: ADC ready flag bit_offset: 0 bit_size: 1 - name: EOSMP description: ADC group regular end of sampling flag bit_offset: 1 bit_size: 1 - name: EOC description: ADC group regular end of unitary conversion flag bit_offset: 2 bit_size: 1 - name: EOS description: ADC group regular end of sequence conversions flag bit_offset: 3 bit_size: 1 - name: OVR description: ADC group regular overrun flag bit_offset: 4 bit_size: 1 - name: AWD1 description: ADC analog watchdog 1 flag bit_offset: 7 bit_size: 1 - name: AWD2 description: ADC analog watchdog 2 flag bit_offset: 8 bit_size: 1 - name: AWD3 description: ADC analog watchdog 3 flag bit_offset: 9 bit_size: 1 - name: EOCAL description: End Of Calibration flag bit_offset: 11 bit_size: 1 - name: CCRDY description: Channel Configuration Ready flag bit_offset: 13 bit_size: 1 fieldset/SIDR: description: EXTI Size ID register fields: - name: SID description: Size Identification bit_offset: 0 bit_size: 32 fieldset/SMPR: description: ADC sampling time register fields: - name: SMP1 description: Sampling time selection bit_offset: 0 bit_size: 3 enum: SAMPLE_TIME - name: SMP2 description: Sampling time selection bit_offset: 4 bit_size: 3 enum: SAMPLE_TIME - name: SMPSEL description: Channel sampling time selection bit_offset: 8 bit_size: 1 array: len: 19 stride: 0 fieldset/VERR: description: EXTI IP Version register fields: - name: MINREV description: Minor Revision number bit_offset: 0 bit_size: 4 - name: MAJREV description: Major Revision number bit_offset: 4 bit_size: 4 enum/SAMPLE_TIME: bit_size: 3 variants: - name: Cycles1_5 description: 1.5 ADC cycles value: 0 - name: Cycles3_5 description: 3.5 ADC cycles value: 1 - name: Cycles7_5 description: 7.5 ADC cycles value: 2 - name: Cycles12_5 description: 12.5 ADC cycles value: 3 - name: Cycles19_5 description: 19.5 ADC cycles value: 4 - name: Cycles39_5 description: 39.5 ADC cycles value: 5 - name: Cycles79_5 description: 79.5 ADC cycles value: 6 - name: Cycles160_5 description: 160.5 ADC cycles value: 7 enum/RES: bit_size: 2 variants: - name: TwelveBit description: 12-bit resolution value: 0 - name: TenBit description: 10-bit resolution value: 1 - name: EightBit description: 8-bit resolution value: 2 - name: SixBit description: 6-bit resolution value: 3