--- block/QUADSPI: description: QuadSPI interface items: - byte_offset: 0 description: control register fieldset: CR name: CR - byte_offset: 4 description: device configuration register fieldset: DCR name: DCR - access: Read byte_offset: 8 description: status register fieldset: SR name: SR - byte_offset: 12 description: flag clear register fieldset: FCR name: FCR - byte_offset: 16 description: data length register fieldset: DLR name: DLR - byte_offset: 20 description: communication configuration register fieldset: CCR name: CCR - byte_offset: 24 description: address register fieldset: AR name: AR - byte_offset: 28 description: ABR fieldset: ABR name: ABR - byte_offset: 32 description: data register fieldset: DR name: DR - byte_offset: 36 description: polling status mask register fieldset: PSMKR name: PSMKR - byte_offset: 40 description: polling status match register fieldset: PSMAR name: PSMAR - byte_offset: 44 description: polling interval register fieldset: PIR name: PIR - byte_offset: 48 description: low-power timeout register fieldset: LPTR name: LPTR fieldset/ABR: description: ABR fields: - bit_offset: 0 bit_size: 32 description: ALTERNATE name: ALTERNATE fieldset/AR: description: address register fields: - bit_offset: 0 bit_size: 32 description: Address name: ADDRESS fieldset/CCR: description: communication configuration register fields: - bit_offset: 0 bit_size: 8 description: Instruction name: INSTRUCTION - bit_offset: 8 bit_size: 2 description: Instruction mode name: IMODE - bit_offset: 10 bit_size: 2 description: Address mode name: ADMODE - bit_offset: 12 bit_size: 2 description: Address size name: ADSIZE - bit_offset: 14 bit_size: 2 description: Alternate bytes mode name: ABMODE - bit_offset: 16 bit_size: 2 description: Alternate bytes size name: ABSIZE - bit_offset: 18 bit_size: 5 description: Number of dummy cycles name: DCYC - bit_offset: 24 bit_size: 2 description: Data mode name: DMODE - bit_offset: 26 bit_size: 2 description: Functional mode name: FMODE - bit_offset: 28 bit_size: 1 description: Send instruction only once mode name: SIOO - bit_offset: 30 bit_size: 1 description: DDR hold half cycle name: DHHC - bit_offset: 31 bit_size: 1 description: Double data rate mode name: DDRM fieldset/CR: description: control register fields: - bit_offset: 0 bit_size: 1 description: Enable name: EN - bit_offset: 1 bit_size: 1 description: Abort request name: ABORT - bit_offset: 2 bit_size: 1 description: DMA enable name: DMAEN - bit_offset: 3 bit_size: 1 description: Timeout counter enable name: TCEN - bit_offset: 4 bit_size: 1 description: Sample shift name: SSHIFT - bit_offset: 6 bit_size: 1 description: Dual-flash mode name: DFM - bit_offset: 7 bit_size: 1 description: FLASH memory selection name: FSEL - bit_offset: 8 bit_size: 5 description: IFO threshold level name: FTHRES - bit_offset: 16 bit_size: 1 description: Transfer error interrupt enable name: TEIE - bit_offset: 17 bit_size: 1 description: Transfer complete interrupt enable name: TCIE - bit_offset: 18 bit_size: 1 description: FIFO threshold interrupt enable name: FTIE - bit_offset: 19 bit_size: 1 description: Status match interrupt enable name: SMIE - bit_offset: 20 bit_size: 1 description: TimeOut interrupt enable name: TOIE - bit_offset: 22 bit_size: 1 description: Automatic poll mode stop name: APMS - bit_offset: 23 bit_size: 1 description: Polling match mode name: PMM - bit_offset: 24 bit_size: 8 description: Clock prescaler name: PRESCALER fieldset/DCR: description: device configuration register fields: - bit_offset: 0 bit_size: 1 description: Mode 0 / mode 3 name: CKMODE - bit_offset: 8 bit_size: 3 description: Chip select high time name: CSHT - bit_offset: 16 bit_size: 5 description: FLASH memory size name: FSIZE fieldset/DLR: description: data length register fields: - bit_offset: 0 bit_size: 32 description: Data length name: DL fieldset/DR: description: data register fields: - bit_offset: 0 bit_size: 32 description: Data name: DATA fieldset/FCR: description: flag clear register fields: - bit_offset: 0 bit_size: 1 description: Clear transfer error flag name: CTEF - bit_offset: 1 bit_size: 1 description: Clear transfer complete flag name: CTCF - bit_offset: 3 bit_size: 1 description: Clear status match flag name: CSMF - bit_offset: 4 bit_size: 1 description: Clear timeout flag name: CTOF fieldset/LPTR: description: low-power timeout register fields: - bit_offset: 0 bit_size: 16 description: Timeout period name: TIMEOUT fieldset/PIR: description: polling interval register fields: - bit_offset: 0 bit_size: 16 description: Polling interval name: INTERVAL fieldset/PSMAR: description: polling status match register fields: - bit_offset: 0 bit_size: 32 description: Status match name: MATCH fieldset/PSMKR: description: polling status mask register fields: - bit_offset: 0 bit_size: 32 description: Status mask name: MASK fieldset/SR: description: status register fields: - bit_offset: 0 bit_size: 1 description: Transfer error flag name: TEF - bit_offset: 1 bit_size: 1 description: Transfer complete flag name: TCF - bit_offset: 2 bit_size: 1 description: FIFO threshold flag name: FTF - bit_offset: 3 bit_size: 1 description: Status match flag name: SMF - bit_offset: 4 bit_size: 1 description: Timeout flag name: TOF - bit_offset: 5 bit_size: 1 description: Busy name: BUSY - bit_offset: 8 bit_size: 7 description: FIFO level name: FLEVEL