block/OTFDEC1:
  description: On-The-Fly Decryption engine.
  items:
  - name: CR
    description: OTFDEC control register.
    byte_offset: 0
    fieldset: CR
  - name: PRIVCFGR
    description: OTFDEC_PRIVCFGR.
    byte_offset: 16
    fieldset: PRIVCFGR
  - name: R1CFGR
    description: OTFDEC region 1 configuration register.
    byte_offset: 32
    fieldset: R1CFGR
  - name: R1STARTADDR
    description: OTFDEC region 1 start address register.
    byte_offset: 36
    fieldset: R1STARTADDR
  - name: R1ENDADDR
    description: OTFDEC region 1 end address register.
    byte_offset: 40
    fieldset: R1ENDADDR
  - name: R1NONCER0
    description: OTFDEC region 1 nonce register 0.
    byte_offset: 44
    fieldset: R1NONCER0
  - name: R1NONCER1
    description: OTFDEC region 1 nonce register 1.
    byte_offset: 48
    fieldset: R1NONCER1
  - name: R1KEYR0
    description: OTFDEC region 1 key register 0.
    byte_offset: 52
    fieldset: R1KEYR0
  - name: R1KEYR1
    description: OTFDEC region 1 key register 1.
    byte_offset: 56
    fieldset: R1KEYR1
  - name: R1KEYR2
    description: OTFDEC region 1 key register 2.
    byte_offset: 60
    fieldset: R1KEYR2
  - name: R1KEYR3
    description: OTFDEC region 1 key register 3.
    byte_offset: 64
    fieldset: R1KEYR3
  - name: R2CFGR
    description: OTFDEC region 2 configuration register.
    byte_offset: 80
    fieldset: R2CFGR
  - name: R2STARTADDR
    description: OTFDEC region 2 start address register.
    byte_offset: 84
    fieldset: R2STARTADDR
  - name: R2ENDADDR
    description: OTFDEC region 2 end address register.
    byte_offset: 88
    fieldset: R2ENDADDR
  - name: R2NONCER0
    description: OTFDEC region 2 nonce register 0.
    byte_offset: 92
    fieldset: R2NONCER0
  - name: R2NONCER1
    description: OTFDEC region 2 nonce register 1.
    byte_offset: 96
    fieldset: R2NONCER1
  - name: R2KEYR0
    description: OTFDEC region 2 key register 0.
    byte_offset: 100
    fieldset: R2KEYR0
  - name: R2KEYR1
    description: OTFDEC region 2 key register 1.
    byte_offset: 104
    fieldset: R2KEYR1
  - name: R2KEYR2
    description: OTFDEC region 2 key register 2.
    byte_offset: 108
    fieldset: R2KEYR2
  - name: R2KEYR3
    description: OTFDEC region 2 key register 3.
    byte_offset: 112
    fieldset: R2KEYR3
  - name: R3CFGR
    description: OTFDEC region 3 configuration register.
    byte_offset: 128
    fieldset: R3CFGR
  - name: R3STARTADDR
    description: OTFDEC region 3 start address register.
    byte_offset: 132
    fieldset: R3STARTADDR
  - name: R3ENDADDR
    description: OTFDEC region 3 end address register.
    byte_offset: 136
    fieldset: R3ENDADDR
  - name: R3NONCER0
    description: OTFDEC region 3 nonce register 0.
    byte_offset: 140
    fieldset: R3NONCER0
  - name: R3NONCER1
    description: OTFDEC region 3 nonce register 1.
    byte_offset: 144
    fieldset: R3NONCER1
  - name: R3KEYR0
    description: OTFDEC region 3 key register 0.
    byte_offset: 148
    fieldset: R3KEYR0
  - name: R3KEYR1
    description: OTFDEC region 3 key register 1.
    byte_offset: 152
    fieldset: R3KEYR1
  - name: R3KEYR2
    description: OTFDEC region 3 key register 2.
    byte_offset: 156
    fieldset: R3KEYR2
  - name: R3KEYR3
    description: OTFDEC region 3 key register 3.
    byte_offset: 160
    fieldset: R3KEYR3
  - name: R4CFGR
    description: OTFDEC region 4 configuration register.
    byte_offset: 176
    fieldset: R4CFGR
  - name: R4STARTADDR
    description: OTFDEC region 4 start address register.
    byte_offset: 180
    fieldset: R4STARTADDR
  - name: R4ENDADDR
    description: OTFDEC region 4 end address register.
    byte_offset: 184
    fieldset: R4ENDADDR
  - name: R4NONCER0
    description: OTFDEC region 4 nonce register 0.
    byte_offset: 188
    fieldset: R4NONCER0
  - name: R4NONCER1
    description: OTFDEC region 4 nonce register 1.
    byte_offset: 192
    fieldset: R4NONCER1
  - name: R4KEYR0
    description: OTFDEC region 4 key register 0.
    byte_offset: 196
    fieldset: R4KEYR0
  - name: R4KEYR1
    description: OTFDEC region 4 key register 1.
    byte_offset: 200
    fieldset: R4KEYR1
  - name: R4KEYR2
    description: OTFDEC region 4 key register 2.
    byte_offset: 204
    fieldset: R4KEYR2
  - name: R4KEYR3
    description: OTFDEC region 4 key register 3.
    byte_offset: 208
    fieldset: R4KEYR3
  - name: ISR
    description: OTFDEC interrupt status register.
    byte_offset: 768
    fieldset: ISR
  - name: ICR
    description: OTFDEC interrupt clear register.
    byte_offset: 772
    fieldset: ICR
  - name: IER
    description: OTFDEC interrupt enable register.
    byte_offset: 776
    fieldset: IER
fieldset/CR:
  description: OTFDEC control register.
  fields:
  - name: ENC
    description: 'Encryption mode bit When this bit is set, OTFDEC is used in encryption mode, during which application can write clear text data then read back encrypted data. When this bit is cleared (default), OTFDEC is used in decryption mode, during which application only read back decrypted data. For both modes, cryptographic context (keys, nonces, firmware versions) must be properly initialized. When this bit is set, only data accesses are allowed (zeros are returned otherwise, and XONEIF is set). When MODE = 11, enhanced encryption mode is automatically selected. Note: When ENC bit is set, no access to OCTOSPI must be done (registers and Memory‑mapped region).'
    bit_offset: 0
    bit_size: 1
fieldset/ICR:
  description: OTFDEC interrupt clear register.
  fields:
  - name: SEIF
    description: Security error interrupt flag clear This bit is written by application, and always read as 0.
    bit_offset: 0
    bit_size: 1
  - name: XONEIF
    description: Execute-only execute-never error interrupt flag clear This bit is written by application, and always read as 0.
    bit_offset: 1
    bit_size: 1
  - name: KEIF
    description: 'Key error interrupt flag clear This bit is written by application, and always read as 0. Note: Clearing KEIF does not solve the source of the problem (bad key registers). To be able to access again any encrypted region, OTFDEC key registers must be properly initialized again.'
    bit_offset: 2
    bit_size: 1
fieldset/IER:
  description: OTFDEC interrupt enable register.
  fields:
  - name: SEIE
    description: Security error interrupt enable This bit is read and written by application. It controls the OTFDEC interrupt generation when SEIF flag status is set.
    bit_offset: 0
    bit_size: 1
  - name: XONEIE
    description: Execute-only execute-never error interrupt enable This bit is read and written by application. It controls the OTFDEC interrupt generation when XONEIF flag status is set.
    bit_offset: 1
    bit_size: 1
  - name: KEIE
    description: Key error interrupt enable This bit is read and written by application. It controls the OTFDEC interrupt generation when KEIF flag status is set.
    bit_offset: 2
    bit_size: 1
fieldset/ISR:
  description: OTFDEC interrupt status register.
  fields:
  - name: SEIF
    description: Security error interrupt flag status This bit is set by hardware and read only by application. This bit is set when at least one security error has been detected. This bit is cleared when application sets in OTFDEC_ICR the corresponding bit to 1.
    bit_offset: 0
    bit_size: 1
  - name: XONEIF
    description: Execute-only execute-never error interrupt flag status This bit is set by hardware and read only by application. This bit is set when a read access and not an instruction fetch is detected on any encrypted region with MODE bits set to 11. Lastly, XONEIF is also set when an execute access is detected while encryption mode is enabled. This bit is cleared when application sets in OTFDEC_ICR the corresponding bit to 1.
    bit_offset: 1
    bit_size: 1
  - name: KEIF
    description: Key error interrupt flag status This bit is set by hardware and read only by application. The bit is set when a read access occurs on an encrypted region, while its key registers is null or not properly initialized (KEYCRC = 0x0). This bit is cleared when the application sets in OTFDEC_ICR the corresponding bit to 1. After KEIF is set any subsequent read to the region with bad key registers returns a zeroed value. This state remains until those key registers are properly initialized (KEYCRC not zero).
    bit_offset: 2
    bit_size: 1
fieldset/PRIVCFGR:
  description: OTFDEC_PRIVCFGR.
  fields:
  - name: PRIV
    description: 'Privileged access protection. Unprivileged read accesses to registers return zeros Unprivileged write accesses to registers are ignored. Note: This bit can only be written in privileged mode. There is no limitations on reads.'
    bit_offset: 0
    bit_size: 1
fieldset/R1CFGR:
  description: OTFDEC region 1 configuration register.
  fields:
  - name: REG_EN
    description: 'region on-the-fly decryption enable Note: Garbage is decrypted if region context (version, key, nonce) is not valid when this bit is set.'
    bit_offset: 0
    bit_size: 1
  - name: CONFIGLOCK
    description: 'region config lock Note: This bit is set once. If this bit is set, it can only be reset to 0 if OTFDEC is reset. Setting this bit forces KEYLOCK bit to 1.'
    bit_offset: 1
    bit_size: 1
  - name: KEYLOCK
    description: 'region key lock Note: This bit is set once: if this bit is set, it can only be reset to 0 if the OTFDEC is reset.'
    bit_offset: 2
    bit_size: 1
  - name: MODE
    description: 'operating mode This bitfield selects the OTFDEC operating mode for this region: Others: Reserved When MODE ≠ 11, the standard AES encryption mode is activated. When either of the MODE bits are changed, the region key and associated CRC are zeroed.'
    bit_offset: 4
    bit_size: 2
  - name: KEYCRC
    description: 'region key 8-bit CRC When KEYLOCK = 0, KEYCRC bitfield is automatically computed by hardware while loading the key of this region in this exact sequence: KEYR0 then KEYR1 then KEYR2 then finally KEYR3 (all written once). A new computation starts as soon as a new valid sequence is initiated, and KEYCRC is read as zero until a valid sequence is completed. When KEYLOCK = 1, KEYCRC remains unchanged until the next reset. CRC computation is an 8-bit checksum using the standard CRC-8-CCITT algorithm X8 + X2 + X + 1 (according the convention). Source code is available in . This field is read only. Note: CRC information is updated only after the last bit of the key has been written.'
    bit_offset: 8
    bit_size: 8
  - name: REGx_VERSION
    description: region firmware version This 16-bit bitfield must be correctly initialized before the region corresponding REG_EN bit is set in OTFDEC_RxCFGR.
    bit_offset: 16
    bit_size: 16
fieldset/R1ENDADDR:
  description: OTFDEC region 1 end address register.
  fields:
  - name: REGx_END_ADDR
    description: 'Region AHB end address This register must be written before the region corresponding REG_EN bit in the OTFDEC_RxCFGR register is set, and OTFDEC_RxENDADDR must be strictly greater than OTFDEC_RxSTARTADDR to be valid. Writing to this register is discarded if performed while the region CONFIGLOCK bit in OTFDEC_RxCFGR is set. Note: When determining the region the first 12 bits (lsb) and the last 4 bits (msb) are ignored. When this register is accessed in read the 4 msb bits return zeros and the 12 lsb bits return ones.'
    bit_offset: 0
    bit_size: 32
fieldset/R1KEYR0:
  description: OTFDEC region 1 key register 0.
  fields:
  - name: REGx_KEY
    description: 'Region key, bits [31:0] This register must be written before the region corresponding REG_EN bit in OTFDEC_RxCFGR is set. Reading this register returns a zero value. Writing to this register is discarded if performed while the region CONFIGLOCK or KEYLOCK bit is set in the OTFDEC_RxCFGR. Note: When application successfully changes MODE bits in OTFDEC_RxCFGR and OTFDEC_RxKEYR, and associated KEYCRC are erased.'
    bit_offset: 0
    bit_size: 32
fieldset/R1KEYR1:
  description: OTFDEC region 1 key register 1.
  fields:
  - name: REGx_KEY
    description: Region key, bits [63:32] Refer to the OTFDEC_RxKEYR0 register for description of the KEY[127:0] bitfield.
    bit_offset: 0
    bit_size: 32
fieldset/R1KEYR2:
  description: OTFDEC region 1 key register 2.
  fields:
  - name: REGx_KEY
    description: Region key, bits [95:64] Refer to the OTFDEC_RxKEYR0 register for description of the KEY[127:0] bitfield.
    bit_offset: 0
    bit_size: 32
fieldset/R1KEYR3:
  description: OTFDEC region 1 key register 3.
  fields:
  - name: REGx_KEY
    description: Region key, bits [127:96] Refer to the OTFDEC_RxKEYR0 register for description of the KEY[127:0] bitfield.
    bit_offset: 0
    bit_size: 32
fieldset/R1NONCER0:
  description: OTFDEC region 1 nonce register 0.
  fields:
  - name: REGx_NONCE
    description: Region nonce, bits [31:0] This register must be written before the region corresponding REG_EN bit in OTFDEC_RxCFGR is set. Writing is discarded in this register if performed while the region CONFIGLOCK bit in the OTFDEC_RxCFGR is set.
    bit_offset: 0
    bit_size: 32
fieldset/R1NONCER1:
  description: OTFDEC region 1 nonce register 1.
  fields:
  - name: REGx_NONCE
    description: Region nonce, bits [63:32] Refer to the OTFDEC_RxNONCER0 register for description of the NONCE[63:0] bitfield.
    bit_offset: 0
    bit_size: 32
fieldset/R1STARTADDR:
  description: OTFDEC region 1 start address register.
  fields:
  - name: REGx_START_ADDR
    description: 'Region AHB start address This register must be written before the region corresponding REG_EN bit in the OTFDEC_RxCFGR register is set. Writing to this register is discarded if performed while the region CONFIGLOCK bit in the OTFDEC_RxCFGR register is set. Note: When determining the region the first 12 bits (lsb) and the last 4 bits (msb) are ignored. When this register is accessed in read the 4 msb bits and the 12 lsb bits return zeros.'
    bit_offset: 0
    bit_size: 32
fieldset/R2CFGR:
  description: OTFDEC region 2 configuration register.
  fields:
  - name: REG_EN
    description: 'region on-the-fly decryption enable Note: Garbage is decrypted if region context (version, key, nonce) is not valid when this bit is set.'
    bit_offset: 0
    bit_size: 1
  - name: CONFIGLOCK
    description: 'region config lock Note: This bit is set once. If this bit is set, it can only be reset to 0 if OTFDEC is reset. Setting this bit forces KEYLOCK bit to 1.'
    bit_offset: 1
    bit_size: 1
  - name: KEYLOCK
    description: 'region key lock Note: This bit is set once: if this bit is set, it can only be reset to 0 if the OTFDEC is reset.'
    bit_offset: 2
    bit_size: 1
  - name: MODE
    description: 'operating mode This bitfield selects the OTFDEC operating mode for this region: Others: Reserved When MODE ≠ 11, the standard AES encryption mode is activated. When either of the MODE bits are changed, the region key and associated CRC are zeroed.'
    bit_offset: 4
    bit_size: 2
  - name: KEYCRC
    description: 'region key 8-bit CRC When KEYLOCK = 0, KEYCRC bitfield is automatically computed by hardware while loading the key of this region in this exact sequence: KEYR0 then KEYR1 then KEYR2 then finally KEYR3 (all written once). A new computation starts as soon as a new valid sequence is initiated, and KEYCRC is read as zero until a valid sequence is completed. When KEYLOCK = 1, KEYCRC remains unchanged until the next reset. CRC computation is an 8-bit checksum using the standard CRC-8-CCITT algorithm X8 + X2 + X + 1 (according the convention). Source code is available in . This field is read only. Note: CRC information is updated only after the last bit of the key has been written.'
    bit_offset: 8
    bit_size: 8
  - name: REGx_VERSION
    description: region firmware version This 16-bit bitfield must be correctly initialized before the region corresponding REG_EN bit is set in OTFDEC_RxCFGR.
    bit_offset: 16
    bit_size: 16
fieldset/R2ENDADDR:
  description: OTFDEC region 2 end address register.
  fields:
  - name: REGx_END_ADDR
    description: 'Region AHB end address This register must be written before the region corresponding REG_EN bit in the OTFDEC_RxCFGR register is set, and OTFDEC_RxENDADDR must be strictly greater than OTFDEC_RxSTARTADDR to be valid. Writing to this register is discarded if performed while the region CONFIGLOCK bit in OTFDEC_RxCFGR is set. Note: When determining the region the first 12 bits (lsb) and the last 4 bits (msb) are ignored. When this register is accessed in read the 4 msb bits return zeros and the 12 lsb bits return ones.'
    bit_offset: 0
    bit_size: 32
fieldset/R2KEYR0:
  description: OTFDEC region 2 key register 0.
  fields:
  - name: REGx_KEY
    description: 'Region key, bits [31:0] This register must be written before the region corresponding REG_EN bit in OTFDEC_RxCFGR is set. Reading this register returns a zero value. Writing to this register is discarded if performed while the region CONFIGLOCK or KEYLOCK bit is set in the OTFDEC_RxCFGR. Note: When application successfully changes MODE bits in OTFDEC_RxCFGR and OTFDEC_RxKEYR, and associated KEYCRC are erased.'
    bit_offset: 0
    bit_size: 32
fieldset/R2KEYR1:
  description: OTFDEC region 2 key register 1.
  fields:
  - name: REGx_KEY
    description: Region key, bits [63:32] Refer to the OTFDEC_RxKEYR0 register for description of the KEY[127:0] bitfield.
    bit_offset: 0
    bit_size: 32
fieldset/R2KEYR2:
  description: OTFDEC region 2 key register 2.
  fields:
  - name: REGx_KEY
    description: Region key, bits [95:64] Refer to the OTFDEC_RxKEYR0 register for description of the KEY[127:0] bitfield.
    bit_offset: 0
    bit_size: 32
fieldset/R2KEYR3:
  description: OTFDEC region 2 key register 3.
  fields:
  - name: REGx_KEY
    description: Region key, bits [127:96] Refer to the OTFDEC_RxKEYR0 register for description of the KEY[127:0] bitfield.
    bit_offset: 0
    bit_size: 32
fieldset/R2NONCER0:
  description: OTFDEC region 2 nonce register 0.
  fields:
  - name: REGx_NONCE
    description: Region nonce, bits [31:0] This register must be written before the region corresponding REG_EN bit in OTFDEC_RxCFGR is set. Writing is discarded in this register if performed while the region CONFIGLOCK bit in the OTFDEC_RxCFGR is set.
    bit_offset: 0
    bit_size: 32
fieldset/R2NONCER1:
  description: OTFDEC region 2 nonce register 1.
  fields:
  - name: REGx_NONCE
    description: Region nonce, bits [63:32] Refer to the OTFDEC_RxNONCER0 register for description of the NONCE[63:0] bitfield.
    bit_offset: 0
    bit_size: 32
fieldset/R2STARTADDR:
  description: OTFDEC region 2 start address register.
  fields:
  - name: REGx_START_ADDR
    description: 'Region AHB start address This register must be written before the region corresponding REG_EN bit in the OTFDEC_RxCFGR register is set. Writing to this register is discarded if performed while the region CONFIGLOCK bit in the OTFDEC_RxCFGR register is set. Note: When determining the region the first 12 bits (lsb) and the last 4 bits (msb) are ignored. When this register is accessed in read the 4 msb bits and the 12 lsb bits return zeros.'
    bit_offset: 0
    bit_size: 32
fieldset/R3CFGR:
  description: OTFDEC region 3 configuration register.
  fields:
  - name: REG_EN
    description: 'region on-the-fly decryption enable Note: Garbage is decrypted if region context (version, key, nonce) is not valid when this bit is set.'
    bit_offset: 0
    bit_size: 1
  - name: CONFIGLOCK
    description: 'region config lock Note: This bit is set once. If this bit is set, it can only be reset to 0 if OTFDEC is reset. Setting this bit forces KEYLOCK bit to 1.'
    bit_offset: 1
    bit_size: 1
  - name: KEYLOCK
    description: 'region key lock Note: This bit is set once: if this bit is set, it can only be reset to 0 if the OTFDEC is reset.'
    bit_offset: 2
    bit_size: 1
  - name: MODE
    description: 'operating mode This bitfield selects the OTFDEC operating mode for this region: Others: Reserved When MODE ≠ 11, the standard AES encryption mode is activated. When either of the MODE bits are changed, the region key and associated CRC are zeroed.'
    bit_offset: 4
    bit_size: 2
  - name: KEYCRC
    description: 'region key 8-bit CRC When KEYLOCK = 0, KEYCRC bitfield is automatically computed by hardware while loading the key of this region in this exact sequence: KEYR0 then KEYR1 then KEYR2 then finally KEYR3 (all written once). A new computation starts as soon as a new valid sequence is initiated, and KEYCRC is read as zero until a valid sequence is completed. When KEYLOCK = 1, KEYCRC remains unchanged until the next reset. CRC computation is an 8-bit checksum using the standard CRC-8-CCITT algorithm X8 + X2 + X + 1 (according the convention). Source code is available in . This field is read only. Note: CRC information is updated only after the last bit of the key has been written.'
    bit_offset: 8
    bit_size: 8
  - name: REGx_VERSION
    description: region firmware version This 16-bit bitfield must be correctly initialized before the region corresponding REG_EN bit is set in OTFDEC_RxCFGR.
    bit_offset: 16
    bit_size: 16
fieldset/R3ENDADDR:
  description: OTFDEC region 3 end address register.
  fields:
  - name: REGx_END_ADDR
    description: 'Region AHB end address This register must be written before the region corresponding REG_EN bit in the OTFDEC_RxCFGR register is set, and OTFDEC_RxENDADDR must be strictly greater than OTFDEC_RxSTARTADDR to be valid. Writing to this register is discarded if performed while the region CONFIGLOCK bit in OTFDEC_RxCFGR is set. Note: When determining the region the first 12 bits (lsb) and the last 4 bits (msb) are ignored. When this register is accessed in read the 4 msb bits return zeros and the 12 lsb bits return ones.'
    bit_offset: 0
    bit_size: 32
fieldset/R3KEYR0:
  description: OTFDEC region 3 key register 0.
  fields:
  - name: REGx_KEY
    description: 'Region key, bits [31:0] This register must be written before the region corresponding REG_EN bit in OTFDEC_RxCFGR is set. Reading this register returns a zero value. Writing to this register is discarded if performed while the region CONFIGLOCK or KEYLOCK bit is set in the OTFDEC_RxCFGR. Note: When application successfully changes MODE bits in OTFDEC_RxCFGR and OTFDEC_RxKEYR, and associated KEYCRC are erased.'
    bit_offset: 0
    bit_size: 32
fieldset/R3KEYR1:
  description: OTFDEC region 3 key register 1.
  fields:
  - name: REGx_KEY
    description: Region key, bits [63:32] Refer to the OTFDEC_RxKEYR0 register for description of the KEY[127:0] bitfield.
    bit_offset: 0
    bit_size: 32
fieldset/R3KEYR2:
  description: OTFDEC region 3 key register 2.
  fields:
  - name: REGx_KEY
    description: Region key, bits [95:64] Refer to the OTFDEC_RxKEYR0 register for description of the KEY[127:0] bitfield.
    bit_offset: 0
    bit_size: 32
fieldset/R3KEYR3:
  description: OTFDEC region 3 key register 3.
  fields:
  - name: REGx_KEY
    description: Region key, bits [127:96] Refer to the OTFDEC_RxKEYR0 register for description of the KEY[127:0] bitfield.
    bit_offset: 0
    bit_size: 32
fieldset/R3NONCER0:
  description: OTFDEC region 3 nonce register 0.
  fields:
  - name: REGx_NONCE
    description: Region nonce, bits [31:0] This register must be written before the region corresponding REG_EN bit in OTFDEC_RxCFGR is set. Writing is discarded in this register if performed while the region CONFIGLOCK bit in the OTFDEC_RxCFGR is set.
    bit_offset: 0
    bit_size: 32
fieldset/R3NONCER1:
  description: OTFDEC region 3 nonce register 1.
  fields:
  - name: REGx_NONCE
    description: Region nonce, bits [63:32] Refer to the OTFDEC_RxNONCER0 register for description of the NONCE[63:0] bitfield.
    bit_offset: 0
    bit_size: 32
fieldset/R3STARTADDR:
  description: OTFDEC region 3 start address register.
  fields:
  - name: REGx_START_ADDR
    description: 'Region AHB start address This register must be written before the region corresponding REG_EN bit in the OTFDEC_RxCFGR register is set. Writing to this register is discarded if performed while the region CONFIGLOCK bit in the OTFDEC_RxCFGR register is set. Note: When determining the region the first 12 bits (lsb) and the last 4 bits (msb) are ignored. When this register is accessed in read the 4 msb bits and the 12 lsb bits return zeros.'
    bit_offset: 0
    bit_size: 32
fieldset/R4CFGR:
  description: OTFDEC region 4 configuration register.
  fields:
  - name: REG_EN
    description: 'region on-the-fly decryption enable Note: Garbage is decrypted if region context (version, key, nonce) is not valid when this bit is set.'
    bit_offset: 0
    bit_size: 1
  - name: CONFIGLOCK
    description: 'region config lock Note: This bit is set once. If this bit is set, it can only be reset to 0 if OTFDEC is reset. Setting this bit forces KEYLOCK bit to 1.'
    bit_offset: 1
    bit_size: 1
  - name: KEYLOCK
    description: 'region key lock Note: This bit is set once: if this bit is set, it can only be reset to 0 if the OTFDEC is reset.'
    bit_offset: 2
    bit_size: 1
  - name: MODE
    description: 'operating mode This bitfield selects the OTFDEC operating mode for this region: Others: Reserved When MODE ≠ 11, the standard AES encryption mode is activated. When either of the MODE bits are changed, the region key and associated CRC are zeroed.'
    bit_offset: 4
    bit_size: 2
  - name: KEYCRC
    description: 'region key 8-bit CRC When KEYLOCK = 0, KEYCRC bitfield is automatically computed by hardware while loading the key of this region in this exact sequence: KEYR0 then KEYR1 then KEYR2 then finally KEYR3 (all written once). A new computation starts as soon as a new valid sequence is initiated, and KEYCRC is read as zero until a valid sequence is completed. When KEYLOCK = 1, KEYCRC remains unchanged until the next reset. CRC computation is an 8-bit checksum using the standard CRC-8-CCITT algorithm X8 + X2 + X + 1 (according the convention). Source code is available in . This field is read only. Note: CRC information is updated only after the last bit of the key has been written.'
    bit_offset: 8
    bit_size: 8
  - name: REGx_VERSION
    description: region firmware version This 16-bit bitfield must be correctly initialized before the region corresponding REG_EN bit is set in OTFDEC_RxCFGR.
    bit_offset: 16
    bit_size: 16
fieldset/R4ENDADDR:
  description: OTFDEC region 4 end address register.
  fields:
  - name: REGx_END_ADDR
    description: 'Region AHB end address This register must be written before the region corresponding REG_EN bit in the OTFDEC_RxCFGR register is set, and OTFDEC_RxENDADDR must be strictly greater than OTFDEC_RxSTARTADDR to be valid. Writing to this register is discarded if performed while the region CONFIGLOCK bit in OTFDEC_RxCFGR is set. Note: When determining the region the first 12 bits (lsb) and the last 4 bits (msb) are ignored. When this register is accessed in read the 4 msb bits return zeros and the 12 lsb bits return ones.'
    bit_offset: 0
    bit_size: 32
fieldset/R4KEYR0:
  description: OTFDEC region 4 key register 0.
  fields:
  - name: REGx_KEY
    description: 'Region key, bits [31:0] This register must be written before the region corresponding REG_EN bit in OTFDEC_RxCFGR is set. Reading this register returns a zero value. Writing to this register is discarded if performed while the region CONFIGLOCK or KEYLOCK bit is set in the OTFDEC_RxCFGR. Note: When application successfully changes MODE bits in OTFDEC_RxCFGR and OTFDEC_RxKEYR, and associated KEYCRC are erased.'
    bit_offset: 0
    bit_size: 32
fieldset/R4KEYR1:
  description: OTFDEC region 4 key register 1.
  fields:
  - name: REGx_KEY
    description: Region key, bits [63:32] Refer to the OTFDEC_RxKEYR0 register for description of the KEY[127:0] bitfield.
    bit_offset: 0
    bit_size: 32
fieldset/R4KEYR2:
  description: OTFDEC region 4 key register 2.
  fields:
  - name: REGx_KEY
    description: Region key, bits [95:64] Refer to the OTFDEC_RxKEYR0 register for description of the KEY[127:0] bitfield.
    bit_offset: 0
    bit_size: 32
fieldset/R4KEYR3:
  description: OTFDEC region 4 key register 3.
  fields:
  - name: REGx_KEY
    description: Region key, bits [127:96] Refer to the OTFDEC_RxKEYR0 register for description of the KEY[127:0] bitfield.
    bit_offset: 0
    bit_size: 32
fieldset/R4NONCER0:
  description: OTFDEC region 4 nonce register 0.
  fields:
  - name: REGx_NONCE
    description: Region nonce, bits [31:0] This register must be written before the region corresponding REG_EN bit in OTFDEC_RxCFGR is set. Writing is discarded in this register if performed while the region CONFIGLOCK bit in the OTFDEC_RxCFGR is set.
    bit_offset: 0
    bit_size: 32
fieldset/R4NONCER1:
  description: OTFDEC region 4 nonce register 1.
  fields:
  - name: REGx_NONCE
    description: Region nonce, bits [63:32] Refer to the OTFDEC_RxNONCER0 register for description of the NONCE[63:0] bitfield.
    bit_offset: 0
    bit_size: 32
fieldset/R4STARTADDR:
  description: OTFDEC region 4 start address register.
  fields:
  - name: REGx_START_ADDR
    description: 'Region AHB start address This register must be written before the region corresponding REG_EN bit in the OTFDEC_RxCFGR register is set. Writing to this register is discarded if performed while the region CONFIGLOCK bit in the OTFDEC_RxCFGR register is set. Note: When determining the region the first 12 bits (lsb) and the last 4 bits (msb) are ignored. When this register is accessed in read the 4 msb bits and the 12 lsb bits return zeros.'
    bit_offset: 0
    bit_size: 32