---
block/ADC_COMMON:
  description: ADC common registers
  items:
    - name: CSR
      description: ADC Common status register
      byte_offset: 0
      access: Read
      fieldset: CSR
    - name: CCR
      description: ADC common control register
      byte_offset: 4
      fieldset: CCR
    - name: CDR
      description: ADC common regular data register for dual and triple modes
      byte_offset: 8
      access: Read
      fieldset: CDR
fieldset/CCR:
  description: ADC common control register
  fields:
    - name: MULTI
      description: Multi ADC mode selection
      bit_offset: 0
      bit_size: 5
      enum: MULTI
    - name: DELAY
      description: Delay between 2 sampling phases
      bit_offset: 8
      bit_size: 4
    - name: DDS
      description: DMA disable selection for multi-ADC mode
      bit_offset: 13
      bit_size: 1
      enum: DDS
    - name: DMA
      description: Direct memory access mode for multi ADC mode
      bit_offset: 14
      bit_size: 2
      enum: DMA
    - name: ADCPRE
      description: ADC prescaler
      bit_offset: 16
      bit_size: 2
      enum: ADCPRE
    - name: VBATE
      description: VBAT enable
      bit_offset: 22
      bit_size: 1
    - name: TSVREFE
      description: Temperature sensor and VREFINT enable
      bit_offset: 23
      bit_size: 1
fieldset/CDR:
  description: ADC common regular data register for dual and triple modes
  fields:
    - name: DATA
      description: 1st data item of a pair of regular conversions
      bit_offset: 0
      bit_size: 16
      array:
        len: 2
        stride: 16
fieldset/CSR:
  description: ADC common status register
  fields:
    - name: AWD
      description: Analog watchdog flag of ADC 1
      bit_offset: 0
      bit_size: 1
      array:
        len: 3
        stride: 8
      enum: AWD
    - name: EOC
      description: End of conversion of ADC 1
      bit_offset: 1
      bit_size: 1
      array:
        len: 3
        stride: 8
      enum: EOC
    - name: JEOC
      description: Injected channel end of conversion of ADC 1
      bit_offset: 2
      bit_size: 1
      array:
        len: 3
        stride: 8
      enum: JEOC
    - name: JSTRT
      description: Injected channel Start flag of ADC 1
      bit_offset: 3
      bit_size: 1
      array:
        len: 3
        stride: 8
      enum: JSTRT
    - name: STRT
      description: Regular channel Start flag of ADC 1
      bit_offset: 4
      bit_size: 1
      array:
        len: 3
        stride: 8
      enum: STRT
    - name: OVR
      description: Overrun flag of ADC 1
      bit_offset: 5
      bit_size: 1
      array:
        len: 3
        stride: 8
      enum: OVR
enum/ADCPRE:
  bit_size: 2
  variants:
    - name: Div2
      description: PCLK2 divided by 2
      value: 0
    - name: Div4
      description: PCLK2 divided by 4
      value: 1
    - name: Div6
      description: PCLK2 divided by 6
      value: 2
    - name: Div8
      description: PCLK2 divided by 8
      value: 3
enum/AWD:
  bit_size: 1
  variants:
    - name: NoEvent
      description: No analog watchdog event occurred
      value: 0
    - name: Event
      description: Analog watchdog event occurred
      value: 1
enum/DDS:
  bit_size: 1
  variants:
    - name: Single
      description: No new DMA request is issued after the last transfer
      value: 0
    - name: Continuous
      description: "DMA requests are issued as long as data are converted and DMA=01, 10 or 11"
      value: 1
enum/DMA:
  bit_size: 2
  variants:
    - name: Disabled
      description: DMA mode disabled
      value: 0
    - name: Mode1
      description: DMA mode 1 enabled (2 / 3 half-words one by one - 1 then 2 then 3)
      value: 1
    - name: Mode2
      description: DMA mode 2 enabled (2 / 3 half-words by pairs - 2&1 then 1&3 then 3&2)
      value: 2
    - name: Mode3
      description: DMA mode 3 enabled (2 / 3 half-words by pairs - 2&1 then 1&3 then 3&2)
      value: 3
enum/EOC:
  bit_size: 1
  variants:
    - name: NotComplete
      description: Conversion is not complete
      value: 0
    - name: Complete
      description: Conversion complete
      value: 1
enum/JEOC:
  bit_size: 1
  variants:
    - name: NotComplete
      description: Conversion is not complete
      value: 0
    - name: Complete
      description: Conversion complete
      value: 1
enum/JSTRT:
  bit_size: 1
  variants:
    - name: NotStarted
      description: No injected channel conversion started
      value: 0
    - name: Started
      description: Injected channel conversion has started
      value: 1
enum/MULTI:
  bit_size: 5
  variants:
    - name: Independent
      description: "All the ADCs independent: independent mode"
      value: 0
    - name: DualRJ
      description: "Dual ADC1 and ADC2, combined regular and injected simultaneous mode"
      value: 1
    - name: DualRA
      description: "Dual ADC1 and ADC2, combined regular and alternate trigger mode"
      value: 2
    - name: DualJ
      description: "Dual ADC1 and ADC2, injected simultaneous mode only"
      value: 5
    - name: DualR
      description: "Dual ADC1 and ADC2, regular simultaneous mode only"
      value: 6
    - name: DualI
      description: "Dual ADC1 and ADC2, interleaved mode only"
      value: 7
    - name: DualA
      description: "Dual ADC1 and ADC2, alternate trigger mode only"
      value: 9
    - name: TripleRJ
      description: "Triple ADC, regular and injected simultaneous mode"
      value: 17
    - name: TripleRA
      description: "Triple ADC, regular and alternate trigger mode"
      value: 18
    - name: TripleJ
      description: "Triple ADC, injected simultaneous mode only"
      value: 21
    - name: TripleR
      description: "Triple ADC, regular simultaneous mode only"
      value: 22
    - name: TripleI
      description: "Triple ADC, interleaved mode only"
      value: 23
    - name: TripleA
      description: "Triple ADC, alternate trigger mode only"
      value: 24
enum/OVR:
  bit_size: 1
  variants:
    - name: NoOverrun
      description: No overrun occurred
      value: 0
    - name: Overrun
      description: Overrun occurred
      value: 1
enum/STRT:
  bit_size: 1
  variants:
    - name: NotStarted
      description: No regular channel conversion started
      value: 0
    - name: Started
      description: Regular channel conversion has started
      value: 1