Dario Nieuwenhuis
|
73ab4d3f67
|
Merge pull request #451 from eZioPan/lptim-v2
lptim v2
|
2024-04-05 11:28:05 +00:00 |
|
qff233
|
cf5ab0f41b
|
Fix ADC resolution enum for stm32g4
|
2024-04-05 01:13:23 +08:00 |
|
eZio Pan
|
d9625637f2
|
add lptim_v2a to chips.rs
|
2024-04-05 00:06:01 +08:00 |
|
eZio Pan
|
029320446b
|
add lptim to u5 wba
|
2024-04-04 23:29:48 +08:00 |
|
eZio Pan
|
59cb83596f
|
add to chips.rs
|
2024-04-04 23:04:21 +08:00 |
|
Romain Goyet
|
e7b493c058
|
Add TSC support for STM32WBA
|
2024-04-02 20:30:35 -04:00 |
|
Adam Greig
|
544184c70e
|
rcc: add override so SAI23SEL is used
|
2024-03-09 18:53:48 +00:00 |
|
Torin Cooper-Bennun
|
d1f376978d
|
fix ADC, DAC clock muxes for H5, U5
the clock selection bit is named ADCDACSEL, shared between all ADCs and
DACs
|
2024-03-04 10:52:06 +00:00 |
|
Dario Nieuwenhuis
|
59bb84fbcb
|
rcc/c0: fix HSI -> HSISYS/HSIKER
|
2024-03-03 23:50:04 +01:00 |
|
Dario Nieuwenhuis
|
d67103f97f
|
More accurate USB muxes.
|
2024-03-01 22:50:31 +01:00 |
|
Dario Nieuwenhuis
|
d7462d805e
|
Merge pull request #432 from caleb-garrett/cryp
CRYP perimap order
|
2024-02-29 15:17:40 +00:00 |
|
Caleb Garrett
|
c6e42fff7c
|
Correct CRYP perimap order.
|
2024-02-27 10:57:20 -05:00 |
|
eZio Pan
|
81d3b42d80
|
rename
|
2024-02-27 20:12:05 +08:00 |
|
eZio Pan
|
147d16f2e6
|
add to chips.rs
|
2024-02-27 20:03:37 +08:00 |
|
Dario Nieuwenhuis
|
0e12074b14
|
Merge pull request #427 from eZioPan/comp_h
COMP for H7 and H5
|
2024-02-27 11:10:30 +00:00 |
|
eZio Pan
|
4e8b96a7f0
|
add to chips.rs
|
2024-02-27 11:34:13 +08:00 |
|
eZio Pan
|
c5ffacbb1f
|
add comp_h7 to chips.rs
|
2024-02-27 11:07:16 +08:00 |
|
Caleb Garrett
|
1a27c693ab
|
Refine cryp perimap.
|
2024-02-26 16:15:42 -05:00 |
|
Dario Nieuwenhuis
|
f03c296cc3
|
Merge pull request #425 from caleb-garrett/cryp_v3
Add cryp v3
|
2024-02-26 19:23:54 +00:00 |
|
Caleb Garrett
|
4eccaefb0d
|
Add cryp v3
|
2024-02-26 13:59:20 -05:00 |
|
Dario Nieuwenhuis
|
37fa6072b3
|
Merge branch 'main' into otfdec_v1
|
2024-02-26 13:09:22 +01:00 |
|
eZio Pan
|
46212f468b
|
add PKA RAM access
|
2024-02-26 15:26:52 +08:00 |
|
eZio Pan
|
a1da820e5b
|
add to chips.rs
|
2024-02-26 14:24:50 +08:00 |
|
Eli Orona
|
4ed2d3f65a
|
Update rcc.rs
|
2024-02-25 16:16:25 -08:00 |
|
Dario Nieuwenhuis
|
d492f504e7
|
Merge pull request #396 from eZioPan/sai_h5_l5_u5
sai h5 l5 u5
|
2024-02-25 22:48:05 +01:00 |
|
Dario Nieuwenhuis
|
a54b019995
|
Merge pull request #414 from eZioPan/fmc_v4
fmc v4 (for H5)
|
2024-02-25 22:47:24 +01:00 |
|
Dario Nieuwenhuis
|
f17c5df815
|
Merge branch 'main' into i3c_v1
|
2024-02-25 22:46:58 +01:00 |
|
Dario Nieuwenhuis
|
22da1f4a0a
|
Merge branch 'main' into aes_v3
|
2024-02-25 22:46:31 +01:00 |
|
Dario Nieuwenhuis
|
8679677e81
|
Merge pull request #418 from eZioPan/saes_v1
saes v1
|
2024-02-25 21:42:14 +00:00 |
|
Dario Nieuwenhuis
|
1084e4ce0c
|
Merge pull request #420 from eZioPan/pka_v1
pka v1
|
2024-02-25 21:38:59 +00:00 |
|
eZio Pan
|
24b62ea85d
|
make address of registers show as hex
|
2024-02-25 22:24:22 +01:00 |
|
eZio Pan
|
2a8bc99b55
|
add pka to chips.rs
|
2024-02-25 21:48:39 +08:00 |
|
eZio Pan
|
213784d231
|
add saes to chip.rs
|
2024-02-25 19:38:56 +08:00 |
|
eZio Pan
|
12810e9455
|
add aes_v3b to chips.rs
|
2024-02-25 13:51:20 +08:00 |
|
eZio Pan
|
39b513b598
|
rename aes_u5 to aes_v3a
|
2024-02-25 13:14:56 +08:00 |
|
eZio Pan
|
99024fc817
|
add to chips.rs
|
2024-02-24 22:58:25 +08:00 |
|
eZio Pan
|
af02de81fd
|
add to chips.rs
|
2024-02-24 19:52:23 +08:00 |
|
eZio Pan
|
e4b07a5988
|
PDM count change
|
2024-02-24 19:30:44 +08:00 |
|
Dario Nieuwenhuis
|
755992f313
|
Merge pull request #407 from MaxiluxSystems/adc_h5
ADC support for H5
|
2024-02-22 21:01:36 +00:00 |
|
Dario Nieuwenhuis
|
f13d86cc23
|
Merge branch 'main' into cec
|
2024-02-22 19:30:51 +01:00 |
|
Torin Cooper-Bennun
|
23e9b3a864
|
ADC support for H5
|
2024-02-22 10:23:28 +00:00 |
|
eZio Pan
|
b388069a24
|
add to chips.rs
|
2024-02-22 16:21:21 +08:00 |
|
eZio Pan
|
28d1514b91
|
add to chips.rs
|
2024-02-22 14:37:53 +08:00 |
|
Dario Nieuwenhuis
|
3e97a2e937
|
Merge pull request #402 from eZioPan/dts-v1
dts v1
|
2024-02-22 00:40:54 +00:00 |
|
Dario Nieuwenhuis
|
fca7e7d85e
|
Merge pull request #403 from eZioPan/iwdg_v3
iwdg v3
|
2024-02-22 00:40:30 +00:00 |
|
eZio Pan
|
b8a934f2eb
|
add to chips.rs
|
2024-02-22 01:23:37 +08:00 |
|
Dario Nieuwenhuis
|
aa826467a5
|
Merge pull request #404 from eZioPan/pssi_v1
pssi v1
|
2024-02-21 17:17:40 +00:00 |
|
eZio Pan
|
3c5a8a32a5
|
add to chips.rs
|
2024-02-22 01:06:51 +08:00 |
|
eZio Pan
|
76f2e02ea8
|
add to chips.rs
|
2024-02-22 00:23:24 +08:00 |
|
eZio Pan
|
4ab86cb898
|
change CRR array length
|
2024-02-21 23:24:27 +08:00 |
|