Dario Nieuwenhuis
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c551c07bf1
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rcc: consistency fixes.
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2023-11-13 01:00:53 +01:00 |
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Dario Nieuwenhuis
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ee64389697
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Rename HSI16 -> HSI
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2023-10-22 22:32:08 +02:00 |
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xoviat
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8bd7ff51b0
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rcc: expand checker to all chips
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2023-10-18 21:01:57 -05:00 |
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xoviat
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c61495fd4e
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rcc: more cleanup
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2023-10-17 16:57:33 -05:00 |
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xoviat
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fb84c0ac55
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rcc: fixup clock names and expand checking
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2023-10-16 17:53:26 -05:00 |
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xoviat
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8b8686a852
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rcc: more mux and enum cleanup
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2023-10-15 10:37:36 -05:00 |
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Dario Nieuwenhuis
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9f45b0c48c
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Rename HSI to HSI16 in L1.
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2023-10-11 01:21:46 +02:00 |
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Dario Nieuwenhuis
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86fb0cfc2f
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chiptool fmt.
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2023-09-16 02:34:03 +02:00 |
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Dario Nieuwenhuis
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c2804abc9a
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rcc: fix inconsistent naming.
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2022-02-14 02:07:08 +01:00 |
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Dario Nieuwenhuis
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0f04776eaa
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rcc: l0, l1, l4: add missing enums.
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2022-01-04 23:56:52 +01:00 |
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Ulf Lilleengen
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a302947e87
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Add PWR register block and fix RCC register block
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2021-09-23 14:40:59 +02:00 |
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Dario Nieuwenhuis
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8534ae884d
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rcc: make GPIO EN/RST regs naming consistent.
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2021-08-19 23:50:42 +02:00 |
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Dario Nieuwenhuis
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6af9f2c0d1
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Add RCC for F3, F7, G4, H7AB, L1, L5, WB*, WL5, WLE
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2021-08-19 19:13:30 +02:00 |
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