1 Commits

Author SHA1 Message Date
Torin Cooper-Bennun
27c71ac451 fdcan: generate register blocks for message RAM
this is a special case, as most data sources don't mention this as a
separate peripheral at all, and those that do don't handle the offsets
in the case of multiple FDCANS

H7 chips have a single 10KB block shared between all FDCANs
2023-11-21 10:45:51 +00:00