121 Commits

Author SHA1 Message Date
xoviat
b14427f2d1 Merge branch 'main' of https://github.com/embassy-rs/stm32-data into rcc 2023-10-13 22:22:05 -05:00
xoviat
8a09bbb62c rcc: more cleanup 2023-10-13 22:20:18 -05:00
xoviat
e90a83a4f0
Merge pull request #281 from noppej/gfxmmu
Add GFXMMU peripheral
2023-10-14 02:26:15 +00:00
xoviat
aa5e909e11 rcc: more enum cleanup 2023-10-13 20:54:24 -05:00
JackN
0f0517404e GFXMMU: Add new peripherals to perimap 2023-10-13 17:12:57 -04:00
xoviat
c4cd46927d rcc: rename h5 clock enum variants and add check 2023-10-12 20:48:35 -05:00
JackN
af1a5f5877 OCTOSPI: Merge peri yamls 2023-10-12 17:44:41 -04:00
JackN
e99c97f0f6 OCTOSPI: Merge peripheral yamls and consolidate enums 2023-10-12 15:43:04 -04:00
JackN
2ab8cf7d44 Remove blanket matches from perimap 2023-10-12 10:45:54 -04:00
JackN
dc7bc1272a Add OCTOSPIM and OCTOSPI to perimap 2023-10-12 10:24:00 -04:00
Dario Nieuwenhuis
6bfa5a0dce rtc/bd fixes. 2023-10-11 03:41:10 +02:00
Dario Nieuwenhuis
f40f5a40c1 Not all L0s have HSI48/CRS. 2023-10-11 01:21:26 +02:00
xoviat
421c595a13 rcc: lower reg data 2023-10-08 18:05:16 -05:00
xoviat
61c9f8c691 rcc: fix mux determinism 2023-10-08 15:43:06 -05:00
Dario Nieuwenhuis
a7bf7f02d1 Fix MCO/MCO1 inconsistency in G0, C0. 2023-10-07 01:13:03 +02:00
xoviat
e7a291e659 sort pins by key 2023-10-05 20:04:58 -05:00
xoviat
2271da1671 Merge branch 'main' of https://github.com/embassy-rs/stm32-data into h7-lsedrv-errata 2023-10-05 19:30:38 -05:00
xoviat
ab12bb45b1 sort pins to avoid diff 2023-10-05 19:08:51 -05:00
Matt Ickstadt
568a7058a1 Create rcc_h7rm04ee.yaml as a copy of rcc_h7.yaml 2023-10-05 10:35:43 -05:00
xoviat
06d13dfd24
Merge pull request #267 from oll3/tamp_block
add TAMP register block for g0, g4, l5, u5 and wl
2023-10-02 21:00:10 +00:00
Dario Nieuwenhuis
4baa9a0079
Merge pull request #265 from xoviat/sel
rcc: pipe through sel mux and generate ir
2023-10-02 20:40:01 +00:00
xoviat
92ae3d5870 optimize hashset gen. 2023-10-01 13:44:30 -05:00
xoviat
4a893c37da add man impl. pin signals 2023-10-01 13:28:31 -05:00
xoviat
8ee2862086
Merge pull request #254 from JuliDi/dont-remove-analogswitch-pins
Handle "_C" pins
2023-09-30 15:28:30 +00:00
xoviat
7ddfef6034 Merge branch 'main' of https://github.com/embassy-rs/stm32-data into sel 2023-09-29 18:22:19 -05:00
xoviat
e36d73af66 Merge branch 'main' of https://github.com/embassy-rs/stm32-data into sbs 2023-09-28 18:52:19 -05:00
xoviat
97a4fb22b2 rename sbs to syscfg 2023-09-28 18:50:30 -05:00
xoviat
0041cf976c opamp: add f3 and g4 2023-09-28 18:32:30 -05:00
xoviat
1b39301d8c Merge branch 'master' into lptim-basic 2023-09-27 21:09:34 -05:00
Olle Sandberg
e7de675353 add TAMP register block for g0, g4, l5, u5 and wl 2023-09-27 07:35:27 +02:00
xoviat
d63a20e69b Merge branch 'main' of https://github.com/embassy-rs/stm32-data into sel 2023-09-26 20:20:38 -05:00
Dario Nieuwenhuis
bdbf126746 flash: set for all l0 chips. 2023-09-26 05:06:10 +02:00
xoviat
1595920962 rcc: pipe through sel mux 2023-09-25 19:26:46 -05:00
xoviat
b99b81e3ad Merge branch 'main' of https://github.com/embassy-rs/stm32-data into rtc 2023-09-25 15:59:32 -05:00
xoviat
604ea4029c generate rccperipheral for rtc 2023-09-25 15:57:52 -05:00
Dario Nieuwenhuis
4f83d5d9cf pwr: add f0, f1. 2023-09-25 00:27:32 +02:00
Dario Nieuwenhuis
2f97514774 pwr: add all VOS enums. 2023-09-18 02:57:23 +02:00
Dario Nieuwenhuis
43c1e7b3be Add STM32WBA support. 2023-09-16 02:34:03 +02:00
xoviat
c3548f2b7a add pwr l0 2023-09-14 17:10:04 -05:00
JuliDi
4484603dbd
first working state with bad sorting 2023-09-14 16:26:53 +02:00
xoviat
4e6a74f69c
Merge pull request #252 from xoviat/adc-g4
g4: fix rcc adc generation and cleanup enums
2023-09-11 21:08:12 +00:00
xoviat
d71fac77e6 g4: fix rcc adc generation 2023-09-11 15:55:53 -05:00
xoviat
b37cec1e73
Merge pull request #251 from xoviat/sdmmc
u5: add sdmmc
2023-09-10 19:08:48 +00:00
xoviat
539d2dd7fe u5: add sdmmc 2023-09-10 14:05:55 -05:00
xoviat
85e6808094
Merge pull request #241 from ExplodingWaffle/main
Add UCPD
2023-09-10 18:24:38 +00:00
xoviat
bbff2b9e6b
Merge pull request #249 from andresv/add-aes
Add AES registers
2023-09-10 18:19:31 +00:00
Andres Vahter
5236cc71ce chips: add AES entries to perimap 2023-09-07 23:08:54 +03:00
Olle Sandberg
9c71725bf2 Support STM32WL5x ADC peripheral 2023-09-05 12:22:56 +02:00
Olle Sandberg
ab99fff0af Support STM32WLEx ADC peripheral
Use adc_g0 since very similar to the WLE one.
2023-09-05 11:59:10 +02:00
Daehyeok Mun
697ff5ff6e Support STM32G4 ADC peripheral 2023-09-03 21:19:35 -07:00