Jens Reimann
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259b4cba9e
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Check if we have all the tools
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2021-06-28 09:04:32 +02:00 |
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Jens Reimann
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064513ba06
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Add .idea/ to ignore
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2021-06-28 09:04:21 +02:00 |
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Dario Nieuwenhuis
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fa14144963
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Merge pull request #51 from bobmcwhirter/docs-in-chip-yaml
Docs in chip yaml
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2021-06-23 19:23:30 +02:00 |
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Bob McWhirter
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7a04696d51
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Tick the box in the README.
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2021-06-23 11:59:20 -04:00 |
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Bob McWhirter
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3e1b2d7c8c
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Adjust parse.py to include datasheet, reference-manual and application-note links.
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2021-06-23 11:58:00 -04:00 |
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Dario Nieuwenhuis
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a4902ab5c3
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dmamux: merge CSR and CFR
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2021-06-23 04:17:18 +02:00 |
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Dario Nieuwenhuis
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3f3a98b3f1
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Set block for DMAMUX.
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2021-06-23 04:14:38 +02:00 |
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Dario Nieuwenhuis
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ac9c476561
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Split DMA/BDMA into v1 (no selection) and v2 (has request selection).
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2021-06-23 04:02:06 +02:00 |
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Dario Nieuwenhuis
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e3c6e44b76
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Rename DMAv1 to BDMA, to allow DMA and BDMA to coexist in H7
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2021-06-23 02:47:27 +02:00 |
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Dario Nieuwenhuis
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d260d9f2cf
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remove gpio_af
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2021-06-23 02:34:00 +02:00 |
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Dario Nieuwenhuis
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29f70ac45f
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Add DMAMUX
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2021-06-23 02:30:55 +02:00 |
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Dario Nieuwenhuis
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983fa80ef3
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Merge pull request #50 from bobmcwhirter/dma
DMA
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2021-06-23 00:47:11 +02:00 |
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Dario Nieuwenhuis
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ac4feed6b2
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Merge pull request #49 from embassy-rs/f0-rcc
F0 rcc, flash and syscfg
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2021-06-22 23:57:12 +02:00 |
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Thales Fragoso
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6656c5c059
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Add F0 syscfg
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2021-06-22 23:53:50 +02:00 |
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Thales Fragoso
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26e4f541ba
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Add F0 FLASH
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2021-06-22 23:53:50 +02:00 |
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Thales Fragoso
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ae8455a336
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Add F0 RCCs
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2021-06-22 23:53:37 +02:00 |
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Dario Nieuwenhuis
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9c5e1072d8
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Merge pull request #48 from Tiwalun/smt32wb55-exti
Add EXTI and IPCC for STM32WB55
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2021-06-22 23:50:00 +02:00 |
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Bob McWhirter
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93900325cb
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Adjust parse.py to include DMA channel/request per chip and peripheral.
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2021-06-22 10:23:57 -04:00 |
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Dominik Boehi
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51395f941a
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Use arrays and blocks for everything in EXTI
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2021-06-21 19:13:26 +02:00 |
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Dominik Boehi
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481e607977
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Add IPCC peripheral to STM32WB55
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2021-06-21 19:13:24 +02:00 |
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Dominik Boehi
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454854d527
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Add EXTI for STM32WB55
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2021-06-21 19:12:00 +02:00 |
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Dario Nieuwenhuis
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77d4ae203b
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Add DBGMCU for all chips
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2021-06-21 01:27:36 +02:00 |
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Dario Nieuwenhuis
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a39cc5e6d2
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Merge pull request #47 from lulf/dual-core
Add support for parsing dual core chips
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2021-06-16 16:24:40 +02:00 |
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Ulf Lilleengen
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3ef6421aa8
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Add more peripherals for wl5x
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2021-06-16 16:07:00 +02:00 |
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Ulf Lilleengen
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9161dbcac9
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Regenerate with dual core support
* Add support for WL55 chip family
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2021-06-16 15:10:42 +02:00 |
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Ulf Lilleengen
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d4fad162ac
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Add support for parsing dual core chips
This modifies the chip format to include an array of cores, and within
each core the interrupts and peripherals for that core.
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2021-06-16 15:10:02 +02:00 |
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Dario Nieuwenhuis
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83b10acc02
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Merge pull request #46 from bobmcwhirter/adc_common_more_families
Adc common more families
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2021-06-14 19:28:35 +02:00 |
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Bob McWhirter
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c511da9664
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And WB55 VREFINT.
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2021-06-14 11:56:04 -04:00 |
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Bob McWhirter
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dea6d819dd
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Add VREFINT for STM32L4 family and reparse.
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2021-06-14 11:43:49 -04:00 |
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Bob McWhirter
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6cdfc6c1e8
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Better parsing around ADC_COMMON base addr.
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2021-06-14 11:43:48 -04:00 |
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Dario Nieuwenhuis
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e478047c78
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Merge pull request #45 from embassy-rs/eth-v2
Eth v2
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2021-06-13 20:54:17 +02:00 |
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Thales Fragoso
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6a6eed71a5
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eth-v2: Remove separate eth dma and mac
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2021-06-13 08:17:21 -03:00 |
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Thales Fragoso
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a7b126b078
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eth-v2: Fix descriptors address fields
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2021-06-13 08:16:11 -03:00 |
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Dario Nieuwenhuis
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8e71f3da8e
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Merge pull request #44 from Tiwalun/stm32wb55-support
Add RCC and SYSCFG for STM32WB55
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2021-06-11 22:46:34 +02:00 |
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Dominik Boehi
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6c872019d0
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Add RCC and SYSCFG for STM32WB55
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2021-06-11 22:36:40 +02:00 |
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Dario Nieuwenhuis
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bd443787e2
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Merge pull request #43 from bobmcwhirter/adc_v3_take2
Adc v3 take2
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2021-06-11 12:10:02 +02:00 |
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Thales Fragoso
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e3cc9b041c
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Add a single yaml for eth_v2
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2021-06-11 00:15:56 -03:00 |
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Thales Fragoso
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2d0ecd1ec0
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Add ethernet (v2) dma and mac
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2021-06-11 00:15:56 -03:00 |
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Bob McWhirter
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f202deb4c1
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Add some enums to ADC fields.
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2021-06-10 15:33:17 -04:00 |
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Bob McWhirter
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b7c071aa71
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Clean up a bit.
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2021-06-10 10:38:02 -04:00 |
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Bob McWhirter
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fc64e88b92
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Extract ADCv3 (arrayification is not possible, slight diffs in field widths)
Extract ADC_COMMON
Create framework for extra synthetic hand-crafted peripherals.
Add VREFINTCAL reg/block/peripheral for STM32L4+.
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2021-06-10 10:38:02 -04:00 |
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Bob McWhirter
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23fed4339b
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ADC v3 attempt #2.
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2021-06-10 10:37:32 -04:00 |
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Ulf Lilleengen
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af3e9e60a3
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Add missing RCC block for H7AB family
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2021-06-10 08:57:46 +02:00 |
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Dario Nieuwenhuis
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4837bee5df
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Remove reference to nonexistent rcc_h7ab
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2021-06-10 03:00:05 +02:00 |
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Dario Nieuwenhuis
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767e8d93f8
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Merge pull request #42 from bobmcwhirter/more_dac
More dac
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2021-06-08 21:08:31 +02:00 |
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Bob McWhirter
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0619fbc974
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Add another regexp for DAC.
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2021-06-08 15:04:58 -04:00 |
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Dario Nieuwenhuis
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978efded08
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Merge pull request #41 from lulf/add-missing-clock-h7spi6
Add missing clock selection for SPI6
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2021-06-08 16:51:14 +02:00 |
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Ulf Lilleengen
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fe163b5ab1
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Add missing SPI6 clock for all H7 family
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2021-06-08 16:49:51 +02:00 |
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Ulf Lilleengen
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e83e6824e5
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Merge pull request #40 from lulf/minor-reg-fixes
Minor register fixes for RCC L4
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2021-06-07 15:32:19 +02:00 |
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Ulf Lilleengen
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e58aa40b74
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Minor register fixes for RCC L4
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2021-06-07 15:31:44 +02:00 |
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