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Author SHA1 Message Date
Ulf Lilleengen
18a99a3a3b Add RCC register for STM32F4 and STM32L4 
Register block based in STM32F427ZI and STM32L4R9.

Use bool for reset registers.

Define clock mapping for RNG peripherals. There are no 1 <-> 1 mapping
of RNG peripheral to clock in the Cubedb sources. The mapping will
pre-select the clock source for RNG for now.
 2021-06-03 11:33:24 +02:00
Dario Nieuwenhuis
9cfdc5a647 Merge pull request #38 from bobmcwhirter/pin_apple_apple_pin 
Pin apple apple pin
 2021-06-02 18:48:37 +02:00
Bob McWhirter
2ae079edfe Adjust parse.py to emit peri-specific pin information. 2021-06-02 12:09:12 -04:00
Dario Nieuwenhuis
883a2d637d Merge pull request #37 from lulf/remove-enum-from-rcc 
Remove enums from enable registers
 2021-06-02 16:41:44 +02:00
Ulf Lilleengen
9ad584c149 Remove enums from enable registers 
Add transform for RCC
 2021-06-02 16:32:43 +02:00
Dario Nieuwenhuis
73bc1bed55 Merge pull request #35 from bobmcwhirter/dac_pin_finding 
Dac pin finding
 2021-06-01 18:34:59 +02:00
Bob McWhirter
42a302668e Dig around for DAC pin assignments. 2021-06-01 12:01:38 -04:00
Dario Nieuwenhuis
c433eb4d47 Make sure core is always a single string 2021-05-31 03:20:41 +02:00
Dario Nieuwenhuis
635ec692e5 Merge pull request #34 from lulf/stm32l0-spi 
Add SPIv2 block to STM32l0
 2021-05-28 17:18:49 +02:00
Dario Nieuwenhuis
b511ab77e9 Merge pull request #32 from lulf/add-dbgmcu-and-crs 
Add DBGMCU for L0 and CRS from headers
 2021-05-28 00:11:10 +02:00
Dario Nieuwenhuis
ef99cbefca Merge pull request #33 from bobmcwhirter/dac_v2 
Dac v2
 2021-05-27 23:38:14 +02:00
Bob McWhirter
10a1de11b1 Split TSEL back up. They are distinct. 2021-05-27 16:19:35 -04:00
Bob McWhirter
fa888988bf Re-parse for DAC v2. 2021-05-27 16:17:01 -04:00
Bob McWhirter
26e98df986 DAC v2-ish regs. 2021-05-27 16:16:41 -04:00
Ulf Lilleengen
52bc9ebf70 Add SPIv2 block to STM32l0 2021-05-27 12:44:29 +02:00
Ulf Lilleengen
25caa7875b Add DBGMCU for L0 and CRS from headers 2021-05-26 15:17:55 +02:00
Dario Nieuwenhuis
af753d9906 Merge pull request #31 from bobmcwhirter/i2c_v1 
I2c v1
 2021-05-25 16:57:38 +02:00
Bob McWhirter
93bc88b3f5 Parse with i2c_v1 perimap. 2021-05-25 10:55:31 -04:00
Bob McWhirter
627ec79b3d Add i2c v1 reg block. 2021-05-25 10:53:29 -04:00
Dario Nieuwenhuis
0bf3c5b50f Merge pull request #30 from embassy-rs/timers-rtc 
Match all timers to a GP16 timer
 2021-05-23 21:53:32 +02:00
Thales Fragoso
c312a29c51 Match all timers to GP16 timer 2021-05-22 22:00:44 -03:00
Dario Nieuwenhuis
86b3d96417 Merge pull request #29 from embassy-rs/h7-rcc 
H7 RCC, PWR, FLASH and DBGMCU
 2021-05-22 16:17:47 +02:00
Thales Fragoso
84b6d351dc Add H7 DBGMCU 2021-05-21 19:55:56 -03:00
Thales Fragoso
e101180bb0 Remove duplicates from H7 FLASH 2021-05-21 19:55:56 -03:00
Thales Fragoso
97fe75e96f parse.py: re-match block when parsing FLASH 2021-05-21 19:55:56 -03:00
Thales Fragoso
52bf4debf5 Add perimap for H7 flash 2021-05-21 19:55:56 -03:00
Thales Fragoso
080776057c Add FLASH to parse.py 2021-05-21 19:55:56 -03:00
Thales Fragoso
15bc0b7340 H7: Add FLASH and PWR 2021-05-21 19:55:56 -03:00
Thales Fragoso
2dda36bd49 H7 RCC: Make more arrays 2021-05-21 19:55:56 -03:00
Thales Fragoso
4199b328ee Add H7 RCC 2021-05-21 19:55:55 -03:00
Dario Nieuwenhuis
d810bb0f75 Merge pull request #28 from bobmcwhirter/i2c_v3_perimap 
Add peri-map for i2c v3.
 2021-05-21 19:54:04 +02:00
Bob McWhirter
9dd8da11d4 It's just a high-latency file... 2021-05-21 13:53:06 -04:00
Bob McWhirter
a9e2682450 Add peri-map for i2c v2 2021-05-21 13:49:08 -04:00
Bob McWhirter
4472e6e81c Move v3 to v2 because they are identical, but replace with f7x variant due to better docs. 2021-05-21 13:45:52 -04:00
Dario Nieuwenhuis
3c43f87999 Merge pull request #26 from lulf/stm32l0-rcc 
Add RCC register block for STM32L0
 2021-05-21 17:59:46 +02:00
Dario Nieuwenhuis
8ea824f9b7 Merge pull request #27 from bobmcwhirter/i2c 
Add I2C v3 (l4+/h7)
 2021-05-21 17:52:07 +02:00
Bob McWhirter
9ff282e2a4 Add I2C v3 (l4+/h7) 2021-05-21 11:49:09 -04:00
Ulf Lilleengen
2ff87b75ce Add RCC register block for STM32L0 2021-05-20 13:26:25 +02:00
Dario Nieuwenhuis
da67ddf088 Merge pull request #25 from lulf/stm32l0-syscfg 
Add SYSCFG register mapping for stm32l0 family
 2021-05-19 11:22:33 +02:00
Ulf Lilleengen
a942bdfbad Add SYSCFG register mapping for stm32l0 family 2021-05-19 10:31:58 +02:00
Dario Nieuwenhuis
8f6142ab5d Merge pull request #24 from bobmcwhirter/spiv3_take2 
Add another peri-map entry for more H7s.
 2021-05-17 17:00:10 +02:00
Bob McWhirter
455c0b2480 Add another peri-map entry for more H7s. 2021-05-17 10:58:37 -04:00
Dario Nieuwenhuis
b1032cc1e3 Merge pull request #23 from bobmcwhirter/spi_v3 
Spi v3
 2021-05-17 15:46:10 +02:00
Bob McWhirter
250efb6c47 Regen SPIv3 chips (H7). 2021-05-17 09:40:54 -04:00
Bob McWhirter
af21df21a5 Extract SPIv3 minus I2S. 2021-05-17 09:40:43 -04:00
Dario Nieuwenhuis
abf5d3f2a2 Add usart v2 2021-05-17 01:53:12 +02:00
Dario Nieuwenhuis
5e59f22819 dma_v2: merge ISR and IFCR fieldsets 2021-05-16 02:53:43 +02:00
Dario Nieuwenhuis
8d8801d432 Merge pull request #22 from bobmcwhirter/spi_v1 
Add SPI v1 peri-map.
 2021-05-13 23:48:04 +02:00
Bob McWhirter
4900d3daec Add SPI v1 peri-map. 2021-05-13 15:08:42 -04:00
Dario Nieuwenhuis
8bd7cb37ae Merge pull request #21 from bobmcwhirter/clocks 
Start parsing RCC clock tree.
 2021-05-11 21:58:48 +02:00