Ulf Lilleengen
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919a61e847
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Add STM32WL5x exti block
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2021-08-17 13:02:49 +02:00 |
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Bob McWhirter
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2c7422ab76
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Special-case the H7 EXTI reg layout.
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2021-08-16 14:59:16 -04:00 |
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Ulf Lilleengen
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4c801c1234
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Merge pull request #78 from lulf/parse-bugfix
Parse bugfix and expose shared usart irqs
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2021-08-16 16:48:39 +02:00 |
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Ulf Lilleengen
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154d226f7a
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Handle shared USART IRQs
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2021-08-16 13:02:25 +02:00 |
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Ulf Lilleengen
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a84e7d8b8c
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Add ability to override peripheral address if bug in header sources
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2021-08-16 13:01:25 +02:00 |
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Ulf Lilleengen
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7489588564
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Give different names to secure and non-secure cores
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2021-08-16 12:38:33 +02:00 |
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Timo Kröger
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c5a86b0744
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CAN interrupts
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2021-08-15 11:13:26 +02:00 |
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Dario Nieuwenhuis
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8c392a059b
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Merge pull request #74 from timokroeger/bxcan
bxCAN Peripheral
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2021-08-15 00:10:26 +02:00 |
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Vincent Stakenburg
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67c16f80cf
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add UART:sci2_v2_1 to parser
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2021-08-13 16:02:12 +02:00 |
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Timo Kröger
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198e4f3247
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Add bxcan registers
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2021-08-06 11:52:47 +02:00 |
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Bob McWhirter
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4a67203c86
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Keep device-id as hex.
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2021-08-02 11:06:26 -04:00 |
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Bob McWhirter
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93490bc42f
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Ensure that any bank is not larger than the total from the SVD.
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2021-08-02 11:06:26 -04:00 |
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Bob McWhirter
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99cd26c33f
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Parse memory layouts for actual region sizes.
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2021-08-02 11:06:25 -04:00 |
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Bob McWhirter
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2e7af6b842
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Parse our memory location bases and name them well-ish.
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2021-08-02 11:06:24 -04:00 |
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Bob McWhirter
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2d38aad861
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Include base addresses for flash and ram.
Remove 'null' entries for datasheets/reference-manuals.
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2021-08-02 11:06:23 -04:00 |
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Timo Kröger
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c02e3dc9ab
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Split f410 and f4 RCC yamls
f410 has the RNGEN at a different position
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2021-07-31 17:40:30 +02:00 |
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Thales Fragoso
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02b44906c9
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Add F4 PWR
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2021-07-28 19:14:39 -03:00 |
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Bob McWhirter
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e4e17c36d0
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Handle NVICs in multi-core chips.
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2021-07-28 09:07:30 -04:00 |
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Dario Nieuwenhuis
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0bbd7c2d31
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Merge pull request #67 from embassy-rs/f4-flash
Add F4 FLASH
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2021-07-28 11:45:51 +02:00 |
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Thales Fragoso
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d53b964978
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Add F4 FLASH
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2021-07-27 21:53:08 -03:00 |
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Grant Miller
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369401ca07
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Add F1 RCC
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2021-07-27 12:11:25 -05:00 |
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Bob McWhirter
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3f583ec196
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Scrape our (B)DMA interrupts per peripheral also.
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2021-07-26 14:10:25 -04:00 |
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Bob McWhirter
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2618ec3a94
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Be fancier on parsing peripheral IRQs.
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2021-07-26 13:33:36 -04:00 |
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Bob McWhirter
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38c403f205
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Fixes #9
Adds per-peripheral interrupts.
Simple list, functionality not otherwise described.
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2021-07-23 14:48:45 -04:00 |
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Dario Nieuwenhuis
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60b4b7d155
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Add dmamux yamls, use them instead of xml/c parsing.
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2021-07-17 07:23:48 +02:00 |
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Bob McWhirter
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bbd3378cdc
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Separate out DMAMUX1 and DMAMUX2 requests.
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2021-07-16 15:43:54 -04:00 |
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Bob McWhirter
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02dd4e13f2
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Parse in the dma HAL headers for the actual request numbers.
Then apply them to fix up where possible because the XML is crap.
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2021-07-16 13:44:40 -04:00 |
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Dario Nieuwenhuis
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134d22af37
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Add H7 SMPS
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2021-07-16 00:38:49 +02:00 |
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Dario Nieuwenhuis
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48b70bdf76
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Merge USARTv2 and USARTv3, they're identical.
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2021-07-15 00:20:17 +02:00 |
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Dario Nieuwenhuis
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6f66c9abdd
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Correctly map some weird F0 chips that have BDMAv2
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2021-07-14 23:47:45 +02:00 |
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Dario Nieuwenhuis
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bc9f64650f
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Parse BDMAv2 req numbers
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2021-07-14 23:38:06 +02:00 |
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Bob McWhirter
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892c520abd
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Clean up parse.py.
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2021-07-12 15:55:13 -04:00 |
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Bob McWhirter
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b187661675
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Change DMA-vs-BDMA parsing to ensure we capture everything without trampling.
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2021-07-12 15:55:13 -04:00 |
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Bob McWhirter
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4823bfee64
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Slightly improve DMA parsing wrt H7 weirdness.
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2021-07-12 15:55:13 -04:00 |
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Bob McWhirter
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7a7b14ed4b
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Adjust parse to remove L or H from clock name.
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2021-07-12 15:55:13 -04:00 |
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Bob McWhirter
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db5538e86d
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Update the RCC scrobbling bits for clock discovery.
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2021-07-06 14:20:10 -04:00 |
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Thales Fragoso
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e9b6cf4283
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Always start DMA channels at zero
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2021-07-03 15:24:16 -03:00 |
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Thales Fragoso
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12a8134dbb
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F0: Manually add usart1 clock
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2021-07-03 01:38:39 -03:00 |
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Bob McWhirter
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cd3ae3473d
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Another special-casing of RCC for H7 default clocks.
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2021-07-01 13:50:55 -04:00 |
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Bob McWhirter
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298b89c886
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Let's hardcode some H7 default clocks for selectables.
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2021-07-01 11:29:27 -04:00 |
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Bob McWhirter
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2d17494980
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Adjust parse to also label UARTs for v3.
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2021-06-30 14:35:52 -04:00 |
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Bob McWhirter
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b02a84bf0e
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Map USARTv3.
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2021-06-30 13:34:43 -04:00 |
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Dario Nieuwenhuis
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ebd5d47c05
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Merge pull request #54 from ctron/feature/fix_i2c_1
[#52]: Fix missing I2C
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2021-06-29 18:31:33 +02:00 |
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Bob McWhirter
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ed248082b8
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Cleanup of parse.
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2021-06-29 10:52:43 -04:00 |
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Jens Reimann
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c4d429e5f7
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[#52]: Fix missing I2C
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2021-06-28 09:39:25 +02:00 |
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Bob McWhirter
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3e1b2d7c8c
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Adjust parse.py to include datasheet, reference-manual and application-note links.
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2021-06-23 11:58:00 -04:00 |
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Dario Nieuwenhuis
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3f3a98b3f1
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Set block for DMAMUX.
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2021-06-23 04:14:38 +02:00 |
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Dario Nieuwenhuis
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ac9c476561
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Split DMA/BDMA into v1 (no selection) and v2 (has request selection).
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2021-06-23 04:02:06 +02:00 |
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Dario Nieuwenhuis
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e3c6e44b76
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Rename DMAv1 to BDMA, to allow DMA and BDMA to coexist in H7
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2021-06-23 02:47:27 +02:00 |
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Dario Nieuwenhuis
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29f70ac45f
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Add DMAMUX
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2021-06-23 02:30:55 +02:00 |
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