xoviat
|
1638192e54
|
ci: clone with more depth
|
2023-10-02 15:57:14 -05:00 |
|
Dario Nieuwenhuis
|
4baa9a0079
|
Merge pull request #265 from xoviat/sel
rcc: pipe through sel mux and generate ir
|
2023-10-02 20:40:01 +00:00 |
|
Olle Sandberg
|
00894c8e3d
|
clean up TAMP registers
Remove obvious 1 bit enums and make arrays of repeated fields.
|
2023-10-02 07:15:40 +02:00 |
|
xoviat
|
dfb25f393c
|
Merge pull request #270 from xoviat/periph-pins
add man impl. pin signals
|
2023-10-01 20:30:15 +00:00 |
|
xoviat
|
92ae3d5870
|
optimize hashset gen.
|
2023-10-01 13:44:30 -05:00 |
|
xoviat
|
4a893c37da
|
add man impl. pin signals
|
2023-10-01 13:28:31 -05:00 |
|
xoviat
|
8ee2862086
|
Merge pull request #254 from JuliDi/dont-remove-analogswitch-pins
Handle "_C" pins
|
2023-09-30 15:28:30 +00:00 |
|
xoviat
|
7ddfef6034
|
Merge branch 'main' of https://github.com/embassy-rs/stm32-data into sel
|
2023-09-29 18:22:19 -05:00 |
|
xoviat
|
23f9d9b236
|
metapac: allow runtime inspection of ir types
|
2023-09-29 18:21:03 -05:00 |
|
xoviat
|
735cab337a
|
Merge pull request #269 from xoviat/sbs
rename sbs to syscfg
|
2023-09-29 00:09:13 +00:00 |
|
xoviat
|
e36d73af66
|
Merge branch 'main' of https://github.com/embassy-rs/stm32-data into sbs
|
2023-09-28 18:52:19 -05:00 |
|
xoviat
|
97a4fb22b2
|
rename sbs to syscfg
|
2023-09-28 18:50:30 -05:00 |
|
xoviat
|
a1052bed00
|
Merge pull request #268 from xoviat/opamp
opamp: add f3 and g4
|
2023-09-28 23:35:20 +00:00 |
|
xoviat
|
0041cf976c
|
opamp: add f3 and g4
|
2023-09-28 18:32:30 -05:00 |
|
xoviat
|
149ea79f2c
|
Merge pull request #230 from xoviat/lptim-basic
lptim: consolidate and add for stm32wb
|
2023-09-28 02:12:08 +00:00 |
|
xoviat
|
1b39301d8c
|
Merge branch 'master' into lptim-basic
|
2023-09-27 21:09:34 -05:00 |
|
xoviat
|
6ed00dbbd0
|
Merge pull request #266 from Radiator-Labs/main
Add enums MCOPRE & MCOSEL to wl5 & wle targets
|
2023-09-27 22:47:15 +00:00 |
|
Olle Sandberg
|
e7de675353
|
add TAMP register block for g0, g4, l5, u5 and wl
|
2023-09-27 07:35:27 +02:00 |
|
xoviat
|
d63a20e69b
|
Merge branch 'main' of https://github.com/embassy-rs/stm32-data into sel
|
2023-09-26 20:20:38 -05:00 |
|
xoviat
|
38619f8b99
|
metapac: generate ir
|
2023-09-26 20:20:28 -05:00 |
|
shakencodes
|
0adf2a75d1
|
Add enums MCOPRE & MCOSEL to wl5 & wle targets
|
2023-09-26 10:55:19 -07:00 |
|
Dario Nieuwenhuis
|
bdbf126746
|
flash: set for all l0 chips.
|
2023-09-26 05:06:10 +02:00 |
|
xoviat
|
1595920962
|
rcc: pipe through sel mux
|
2023-09-25 19:26:46 -05:00 |
|
xoviat
|
1551a1c01a
|
Merge pull request #264 from xoviat/rtc
generate rccperipheral for rtc
|
2023-09-25 21:07:21 +00:00 |
|
xoviat
|
b99b81e3ad
|
Merge branch 'main' of https://github.com/embassy-rs/stm32-data into rtc
|
2023-09-25 15:59:32 -05:00 |
|
xoviat
|
604ea4029c
|
generate rccperipheral for rtc
|
2023-09-25 15:57:52 -05:00 |
|
Dario Nieuwenhuis
|
dd8fa1374d
|
Release stm32-metapac v14
|
2023-09-25 20:20:03 +02:00 |
|
Dario Nieuwenhuis
|
4af533d90e
|
stm32-metapac: only include device.x in link search path if rt is enabled.
|
2023-09-25 20:19:35 +02:00 |
|
Dario Nieuwenhuis
|
74025d56c0
|
Merge pull request #263 from embassy-rs/add-missing-peris
pwr: add f0, f1.
|
2023-09-24 22:30:02 +00:00 |
|
Dario Nieuwenhuis
|
4f83d5d9cf
|
pwr: add f0, f1.
|
2023-09-25 00:27:32 +02:00 |
|
Dario Nieuwenhuis
|
2bdbec6dc0
|
Merge pull request #262 from embassy-rs/rcc-cleanings
More rcc cleanups.
|
2023-09-21 22:12:00 +00:00 |
|
Dario Nieuwenhuis
|
d6b0763327
|
More rcc cleanups.
|
2023-09-19 04:17:00 +02:00 |
|
Dario Nieuwenhuis
|
2dba1f1dde
|
Merge pull request #261 from embassy-rs/vos
wip: add all VOS enums.
|
2023-09-18 00:59:27 +00:00 |
|
Dario Nieuwenhuis
|
2f97514774
|
pwr: add all VOS enums.
|
2023-09-18 02:57:23 +02:00 |
|
xoviat
|
907dd82c84
|
Merge pull request #259 from xoviat/rcc
rcc: use same name for bus psc
|
2023-09-16 22:31:18 +00:00 |
|
xoviat
|
a70aa2f06a
|
rcc: use same name for bus psc
|
2023-09-16 15:43:03 -05:00 |
|
Dario Nieuwenhuis
|
546aead070
|
Merge pull request #257 from embassy-rs/wba
Add STM32WBAxx support
|
2023-09-16 01:37:17 +00:00 |
|
Dario Nieuwenhuis
|
43c1e7b3be
|
Add STM32WBA support.
|
2023-09-16 02:34:03 +02:00 |
|
Dario Nieuwenhuis
|
8fec79a722
|
rcc consistency fixes.
|
2023-09-16 02:34:03 +02:00 |
|
Dario Nieuwenhuis
|
05ea13251c
|
pwr u5 cleanup
|
2023-09-16 02:34:03 +02:00 |
|
Dario Nieuwenhuis
|
86fb0cfc2f
|
chiptool fmt.
|
2023-09-16 02:34:03 +02:00 |
|
Dario Nieuwenhuis
|
9b5d631059
|
wtf
|
2023-09-16 02:34:03 +02:00 |
|
Dario Nieuwenhuis
|
4d58d2d664
|
Merge pull request #256 from xoviat/pwr
Pwr l0 and some cleanup
|
2023-09-14 23:09:34 +00:00 |
|
Dario Nieuwenhuis
|
2304100192
|
ci: fix diff generation for PRs from forks.
|
2023-09-15 00:47:15 +02:00 |
|
xoviat
|
1e9067e0f0
|
pwr/l0: cleanup enums
|
2023-09-14 17:32:36 -05:00 |
|
xoviat
|
1118eb4c96
|
cleanup adc common v2
|
2023-09-14 17:10:13 -05:00 |
|
xoviat
|
c3548f2b7a
|
add pwr l0
|
2023-09-14 17:10:04 -05:00 |
|
JuliDi
|
cf933a89de
|
add proper sorting
|
2023-09-14 16:26:54 +02:00 |
|
JuliDi
|
4484603dbd
|
first working state with bad sorting
|
2023-09-14 16:26:53 +02:00 |
|
Dario Nieuwenhuis
|
2865a53446
|
Merge pull request #255 from embassy-rs/ci-test
ci: upload generated json diff, and generated data+metapac as artifacts.
|
2023-09-14 01:38:57 +00:00 |
|