xoviat
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feec3c1617
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opamp: add other pins for f3 and g4
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2023-10-03 20:38:38 -05:00 |
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xoviat
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06d13dfd24
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Merge pull request #267 from oll3/tamp_block
add TAMP register block for g0, g4, l5, u5 and wl
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2023-10-02 21:00:10 +00:00 |
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xoviat
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4a893c37da
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add man impl. pin signals
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2023-10-01 13:28:31 -05:00 |
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Olle Sandberg
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e7de675353
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add TAMP register block for g0, g4, l5, u5 and wl
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2023-09-27 07:35:27 +02:00 |
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Don Reilly
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51371cb835
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add vrefintcal for f3
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2023-08-05 22:23:05 -05:00 |
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Don Reilly
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5953194935
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cleaning up mess after fixing headers.rs
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2023-08-05 22:14:32 -05:00 |
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Don Reilly
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39d4db37fe
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get common registers for adc12(34)
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2023-08-05 18:27:00 -05:00 |
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Dario Nieuwenhuis
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5365ea053a
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split "magic" block string into an object, so consumers don't have to do tricky parsing.
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2022-02-07 23:12:40 +01:00 |
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Dario Nieuwenhuis
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48fdf50203
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Change peripherals from dict to array
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2022-02-07 02:05:30 +01:00 |
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Bob McWhirter
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c511da9664
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And WB55 VREFINT.
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2021-06-14 11:56:04 -04:00 |
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Bob McWhirter
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dea6d819dd
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Add VREFINT for STM32L4 family and reparse.
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2021-06-14 11:43:49 -04:00 |
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Bob McWhirter
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fc64e88b92
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Extract ADCv3 (arrayification is not possible, slight diffs in field widths)
Extract ADC_COMMON
Create framework for extra synthetic hand-crafted peripherals.
Add VREFINTCAL reg/block/peripheral for STM32L4+.
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2021-06-10 10:38:02 -04:00 |
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