106 Commits

Author SHA1 Message Date
Bob McWhirter
4a67203c86 Keep device-id as hex. 2021-08-02 11:06:26 -04:00
Bob McWhirter
93490bc42f Ensure that any bank is not larger than the total from the SVD. 2021-08-02 11:06:26 -04:00
Bob McWhirter
99cd26c33f Parse memory layouts for actual region sizes. 2021-08-02 11:06:25 -04:00
Bob McWhirter
2e7af6b842 Parse our memory location bases and name them well-ish. 2021-08-02 11:06:24 -04:00
Bob McWhirter
2d38aad861 Include base addresses for flash and ram.
Remove 'null' entries for datasheets/reference-manuals.
2021-08-02 11:06:23 -04:00
Timo Kröger
c02e3dc9ab Split f410 and f4 RCC yamls
f410 has the RNGEN at a different position
2021-07-31 17:40:30 +02:00
Thales Fragoso
02b44906c9 Add F4 PWR 2021-07-28 19:14:39 -03:00
Bob McWhirter
e4e17c36d0 Handle NVICs in multi-core chips. 2021-07-28 09:07:30 -04:00
Dario Nieuwenhuis
0bbd7c2d31 Merge pull request #67 from embassy-rs/f4-flash
Add F4 FLASH
2021-07-28 11:45:51 +02:00
Thales Fragoso
d53b964978 Add F4 FLASH 2021-07-27 21:53:08 -03:00
Grant Miller
369401ca07 Add F1 RCC 2021-07-27 12:11:25 -05:00
Bob McWhirter
3f583ec196 Scrape our (B)DMA interrupts per peripheral also. 2021-07-26 14:10:25 -04:00
Bob McWhirter
2618ec3a94 Be fancier on parsing peripheral IRQs. 2021-07-26 13:33:36 -04:00
Bob McWhirter
38c403f205 Fixes #9
Adds per-peripheral interrupts.
Simple list, functionality not otherwise described.
2021-07-23 14:48:45 -04:00
Dario Nieuwenhuis
60b4b7d155 Add dmamux yamls, use them instead of xml/c parsing. 2021-07-17 07:23:48 +02:00
Bob McWhirter
bbd3378cdc Separate out DMAMUX1 and DMAMUX2 requests. 2021-07-16 15:43:54 -04:00
Bob McWhirter
02dd4e13f2 Parse in the dma HAL headers for the actual request numbers.
Then apply them to fix up where possible because the XML is crap.
2021-07-16 13:44:40 -04:00
Dario Nieuwenhuis
134d22af37 Add H7 SMPS 2021-07-16 00:38:49 +02:00
Dario Nieuwenhuis
48b70bdf76 Merge USARTv2 and USARTv3, they're identical. 2021-07-15 00:20:17 +02:00
Dario Nieuwenhuis
6f66c9abdd Correctly map some weird F0 chips that have BDMAv2 2021-07-14 23:47:45 +02:00
Dario Nieuwenhuis
bc9f64650f Parse BDMAv2 req numbers 2021-07-14 23:38:06 +02:00
Bob McWhirter
892c520abd Clean up parse.py. 2021-07-12 15:55:13 -04:00
Bob McWhirter
b187661675 Change DMA-vs-BDMA parsing to ensure we capture everything without trampling. 2021-07-12 15:55:13 -04:00
Bob McWhirter
4823bfee64 Slightly improve DMA parsing wrt H7 weirdness. 2021-07-12 15:55:13 -04:00
Bob McWhirter
7a7b14ed4b Adjust parse to remove L or H from clock name. 2021-07-12 15:55:13 -04:00
Bob McWhirter
db5538e86d Update the RCC scrobbling bits for clock discovery. 2021-07-06 14:20:10 -04:00
Thales Fragoso
e9b6cf4283 Always start DMA channels at zero 2021-07-03 15:24:16 -03:00
Thales Fragoso
12a8134dbb F0: Manually add usart1 clock 2021-07-03 01:38:39 -03:00
Bob McWhirter
cd3ae3473d Another special-casing of RCC for H7 default clocks. 2021-07-01 13:50:55 -04:00
Bob McWhirter
298b89c886 Let's hardcode some H7 default clocks for selectables. 2021-07-01 11:29:27 -04:00
Bob McWhirter
2d17494980 Adjust parse to also label UARTs for v3. 2021-06-30 14:35:52 -04:00
Bob McWhirter
b02a84bf0e Map USARTv3. 2021-06-30 13:34:43 -04:00
Dario Nieuwenhuis
ebd5d47c05 Merge pull request #54 from ctron/feature/fix_i2c_1
[#52]: Fix missing I2C
2021-06-29 18:31:33 +02:00
Bob McWhirter
ed248082b8 Cleanup of parse. 2021-06-29 10:52:43 -04:00
Jens Reimann
c4d429e5f7 [#52]: Fix missing I2C 2021-06-28 09:39:25 +02:00
Bob McWhirter
3e1b2d7c8c Adjust parse.py to include datasheet, reference-manual and application-note links. 2021-06-23 11:58:00 -04:00
Dario Nieuwenhuis
3f3a98b3f1 Set block for DMAMUX. 2021-06-23 04:14:38 +02:00
Dario Nieuwenhuis
ac9c476561 Split DMA/BDMA into v1 (no selection) and v2 (has request selection). 2021-06-23 04:02:06 +02:00
Dario Nieuwenhuis
e3c6e44b76 Rename DMAv1 to BDMA, to allow DMA and BDMA to coexist in H7 2021-06-23 02:47:27 +02:00
Dario Nieuwenhuis
29f70ac45f Add DMAMUX 2021-06-23 02:30:55 +02:00
Dario Nieuwenhuis
983fa80ef3 Merge pull request #50 from bobmcwhirter/dma
DMA
2021-06-23 00:47:11 +02:00
Thales Fragoso
6656c5c059 Add F0 syscfg 2021-06-22 23:53:50 +02:00
Thales Fragoso
26e4f541ba Add F0 FLASH 2021-06-22 23:53:50 +02:00
Thales Fragoso
ae8455a336 Add F0 RCCs 2021-06-22 23:53:37 +02:00
Bob McWhirter
93900325cb Adjust parse.py to include DMA channel/request per chip and peripheral. 2021-06-22 10:23:57 -04:00
Dominik Boehi
481e607977 Add IPCC peripheral to STM32WB55 2021-06-21 19:13:24 +02:00
Dominik Boehi
454854d527 Add EXTI for STM32WB55 2021-06-21 19:12:00 +02:00
Dario Nieuwenhuis
77d4ae203b Add DBGMCU for all chips 2021-06-21 01:27:36 +02:00
Ulf Lilleengen
3ef6421aa8 Add more peripherals for wl5x 2021-06-16 16:07:00 +02:00
Ulf Lilleengen
d4fad162ac Add support for parsing dual core chips
This modifies the chip format to include an array of cores, and within
each core the interrupts and peripherals for that core.
2021-06-16 15:10:02 +02:00