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rcc: fixup clock names and expand checking

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This commit is contained in:
xoviat 2023-10-16 17:53:26 -05:00
parent 963ebffc07
commit fb84c0ac55
11 changed files with 147 additions and 135 deletions
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2
data/registers/rcc_f0.yaml
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@ -757,7 +757,7 @@ fieldset/CSR:
enum/CECSW:
bit_size: 1
variants:
- name: HSI_Div244
- name: HSI_DIV_244
description: HSI clock divided by 244 selected as CEC clock source
value: 0
- name: LSE

2
data/registers/rcc_f3.yaml
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@ -896,7 +896,7 @@ enum/ADCPRES:
enum/CECSW:
bit_size: 1
variants:
- name: HSI_Div244
- name: HSI_DIV_244
description: HSI clock divided by 244 selected as CEC clock source
value: 0
- name: LSE

2
data/registers/rcc_f3_v2.yaml
View File

@ -872,7 +872,7 @@ enum/ADCPRES:
enum/CECSW:
bit_size: 1
variants:
- name: HSI_Div244
- name: HSI_DIV_244
description: HSI clock divided by 244 selected as CEC clock source
value: 0
- name: LSE

4
data/registers/rcc_g0.yaml
View File

@ -1191,7 +1191,7 @@ enum/ADCSEL:
enum/CECSEL:
bit_size: 1
variants:
- name: HSI16_Div488
- name: HSI_DIV_488
description: HSI16 divided by 488 used as CEC clock
value: 0
- name: LSE
@ -1803,7 +1803,7 @@ enum/RNGSEL:
- name: DISABLE
description: No clock used as RNG clock source
value: 0
- name: HSI16_Div8
- name: HSI_DIV_8
description: HSI divided by 8 used as RNG clock source
value: 1
- name: SYS

2
data/registers/rcc_h50.yaml
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@ -3153,7 +3153,7 @@ enum/SW:
enum/SYSTICKSEL:
bit_size: 2
variants:
- name: HCLK_DIV_8
- name: HCLK1_DIV_8
description: rcc_hclk/8 selected as clock source (default after reset)
value: 0
- name: LSI

24
data/registers/rcc_l0.yaml
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@ -970,25 +970,25 @@ enum/HPRE:
enum/ICSEL:
bit_size: 2
variants:
- name: APB
- name: PCLK1
description: APB clock selected as peripheral clock
value: 0
- name: SYSTEM
- name: SYS
description: System clock selected as peripheral clock
value: 1
- name: HSI16
- name: HSI
description: HSI16 clock selected as peripheral clock
value: 2
enum/LPTIMSEL:
bit_size: 2
variants:
- name: APB
- name: PCLK1
description: APB clock selected as Timer clock
value: 0
- name: LSI
description: LSI clock selected as Timer clock
value: 1
- name: HSI16
- name: HSI
description: HSI16 clock selected as Timer clock
value: 2
- name: LSE
@ -1036,7 +1036,7 @@ enum/MCOSEL:
- name: SYSCLK
description: SYSCLK clock selected
value: 1
- name: HSI16
- name: HSI
description: HSI oscillator clock selected
value: 2
- name: MSI
@ -1126,7 +1126,7 @@ enum/PLLMUL:
enum/PLLSRC:
bit_size: 1
variants:
- name: HSI16
- name: HSI
description: HSI selected as PLL input clock
value: 0
- name: HSE
@ -1186,7 +1186,7 @@ enum/STOPWUCK:
- name: MSI
description: Internal 64 KHz to 4 MHz (MSI) oscillator selected as wake-up from Stop clock
value: 0
- name: HSI16
- name: HSI
description: Internal 16 MHz (HSI) oscillator selected as wake-up from Stop clock (or HSI16/4 if HSI16DIVEN=1)
value: 1
enum/SW:
@ -1195,7 +1195,7 @@ enum/SW:
- name: MSI
description: MSI oscillator used as system clock
value: 0
- name: HSI16
- name: HSI
description: HSI oscillator used as system clock
value: 1
- name: HSE
@ -1207,13 +1207,13 @@ enum/SW:
enum/UARTSEL:
bit_size: 2
variants:
- name: APB
- name: PCLK1
description: APB clock selected as peripheral clock
value: 0
- name: SYSTEM
- name: SYS
description: System clock selected as peripheral clock
value: 1
- name: HSI16
- name: HSI
description: HSI16 clock selected as peripheral clock
value: 2
- name: LSE

24
data/registers/rcc_l0_v2.yaml
View File

@ -1009,25 +1009,25 @@ enum/HPRE:
enum/ICSEL:
bit_size: 2
variants:
- name: APB
- name: PCLK1
description: APB clock selected as peripheral clock
value: 0
- name: SYSTEM
- name: SYS
description: System clock selected as peripheral clock
value: 1
- name: HSI16
- name: HSI
description: HSI16 clock selected as peripheral clock
value: 2
enum/LPTIMSEL:
bit_size: 2
variants:
- name: APB
- name: PCLK1
description: APB clock selected as Timer clock
value: 0
- name: LSI
description: LSI clock selected as Timer clock
value: 1
- name: HSI16
- name: HSI
description: HSI16 clock selected as Timer clock
value: 2
- name: LSE
@ -1075,7 +1075,7 @@ enum/MCOSEL:
- name: SYSCLK
description: SYSCLK clock selected
value: 1
- name: HSI16
- name: HSI
description: HSI oscillator clock selected
value: 2
- name: MSI
@ -1165,7 +1165,7 @@ enum/PLLMUL:
enum/PLLSRC:
bit_size: 1
variants:
- name: HSI16
- name: HSI
description: HSI selected as PLL input clock
value: 0
- name: HSE
@ -1225,7 +1225,7 @@ enum/STOPWUCK:
- name: MSI
description: Internal 64 KHz to 4 MHz (MSI) oscillator selected as wake-up from Stop clock
value: 0
- name: HSI16
- name: HSI
description: Internal 16 MHz (HSI) oscillator selected as wake-up from Stop clock (or HSI16/4 if HSI16DIVEN=1)
value: 1
enum/SW:
@ -1234,7 +1234,7 @@ enum/SW:
- name: MSI
description: MSI oscillator used as system clock
value: 0
- name: HSI16
- name: HSI
description: HSI oscillator used as system clock
value: 1
- name: HSE
@ -1246,13 +1246,13 @@ enum/SW:
enum/UARTSEL:
bit_size: 2
variants:
- name: APB
- name: PCLK1
description: APB clock selected as peripheral clock
value: 0
- name: SYSTEM
- name: SYS
description: System clock selected as peripheral clock
value: 1
- name: HSI16
- name: HSI
description: HSI16 clock selected as peripheral clock
value: 2
- name: LSE

6
data/registers/rcc_l1.yaml
View File

@ -889,7 +889,7 @@ enum/MCOSEL:
- name: SYSCLK
description: SYSCLK clock selected
value: 1
- name: HSI16
- name: HSI
description: HSI16 oscillator clock selected
value: 2
- name: MSI
@ -979,7 +979,7 @@ enum/PLLMUL:
enum/PLLSRC:
bit_size: 1
variants:
- name: HSI16
- name: HSI
description: HSI16 selected as PLL input clock
value: 0
- name: HSE
@ -1039,7 +1039,7 @@ enum/SW:
- name: MSI
description: MSI oscillator used as system clock
value: 0
- name: HSI16
- name: HSI
description: HSI16 oscillator used as system clock
value: 1
- name: HSE

88
data/registers/rcc_l4.yaml
View File

@ -1550,13 +1550,13 @@ fieldset/PLLSAICFGR:
enum/ADCSEL:
bit_size: 2
variants:
- name: Disable
- name: DISABLE
description: No clock selected
value: 0
- name: PLLADC1CLK
- name: PLL1_Q
description: PLLADC1CLK clock selected
value: 1
- name: SYSCLK
- name: SYS
description: SYSCLK clock selected
value: 3
enum/CLK48SEL:
@ -1568,7 +1568,7 @@ enum/CLK48SEL:
- name: PLLSAI1_Q
description: PLLSAI1_Q aka PLL48M1CLK clock selected
value: 1
- name: PLL_Q
- name: PLL1_Q
description: PLL_Q aka PLL48M2CLK clock selected
value: 2
- name: MSI
@ -1580,7 +1580,7 @@ enum/DFSDMSEL:
- name: PCLK2
description: APB2 clock (PCLK2) selected as DFSDM kernel clock
value: 0
- name: SYSCLK
- name: SYS
description: System clock selected as DFSDM kernel clock
value: 1
enum/HPRE:
@ -1616,49 +1616,49 @@ enum/HPRE:
enum/I2C1SEL:
bit_size: 2
variants:
- name: PCLK
- name: PCLK1
description: PCLK clock selected
value: 0
- name: SYSCLK
- name: SYS
description: SYSCLK clock selected
value: 1
- name: HSI16
- name: HSI
description: HSI16 clock selected
value: 2
enum/I2C2SEL:
bit_size: 2
variants:
- name: PCLK
- name: PCLK1
description: PCLK clock selected
value: 0
- name: SYSCLK
- name: SYS
description: SYSCLK clock selected
value: 1
- name: HSI16
- name: HSI
description: HSI16 clock selected
value: 2
enum/I2C3SEL:
bit_size: 2
variants:
- name: PCLK
- name: PCLK1
description: PCLK clock selected
value: 0
- name: SYSCLK
- name: SYS
description: SYSCLK clock selected
value: 1
- name: HSI16
- name: HSI
description: HSI16 clock selected
value: 2
enum/LPTIM1SEL:
bit_size: 2
variants:
- name: PCLK
- name: PCLK1
description: PCLK clock selected
value: 0
- name: LSI
description: LSI clock selected
value: 1
- name: HSI16
- name: HSI
description: HSI16 clock selected
value: 2
- name: LSE
@ -1667,13 +1667,13 @@ enum/LPTIM1SEL:
enum/LPTIM2SEL:
bit_size: 2
variants:
- name: PCLK
- name: PCLK1
description: PCLK clock selected
value: 0
- name: LSI
description: LSI clock selected
value: 1
- name: HSI16
- name: HSI
description: HSI16 clock selected
value: 2
- name: LSE
@ -1682,13 +1682,13 @@ enum/LPTIM2SEL:
enum/LPUART1SEL:
bit_size: 2
variants:
- name: PCLK
- name: PCLK1
description: PCLK clock selected
value: 0
- name: SYSCLK
- name: SYS
description: SYSCLK clock selected
value: 1
- name: HSI16
- name: HSI
description: HSI16 clock selected
value: 2
- name: LSE
@ -1742,13 +1742,13 @@ enum/MCOSEL:
- name: DISABLE
description: No clock
value: 0
- name: SYSCLK
- name: SYS
description: SYSCLK clock selected
value: 1
- name: MSI
description: MSI oscillator clock selected
value: 2
- name: HSI16
- name: HSI
description: HSI oscillator clock selected
value: 3
- name: HSE
@ -2177,7 +2177,7 @@ enum/PLLSRC:
- name: MSI
description: MSI selected as PLL input clock
value: 1
- name: HSI16
- name: HSI
description: HSI selected as PLL input clock
value: 2
- name: HSE
@ -2225,7 +2225,7 @@ enum/SAI1SEL:
- name: PLLSAI2_P
description: PLLSAI2CLK clock is selected as SAIx clock
value: 1
- name: PLL_P
- name: PLL1_P
description: PLLSAI3CLK clock is selected as SAIx clock
value: 2
- name: SAI1_EXTCLK
@ -2240,7 +2240,7 @@ enum/SAI2SEL:
- name: PLLSAI2_P
description: PLLSAI2CLK clock is selected as SAIx clock
value: 1
- name: PLL_P
- name: PLL1_P
description: PLLSAI3CLK clock is selected as SAIx clock
value: 2
- name: SAI2_EXTCLK
@ -2252,7 +2252,7 @@ enum/STOPWUCK:
- name: MSI
description: MSI oscillator selected as wake-up from Stop clock
value: 0
- name: HSI16
- name: HSI
description: HSI oscillator selected as wake-up from Stop clock
value: 1
enum/SW:
@ -2261,7 +2261,7 @@ enum/SW:
- name: MSI
description: MSI selected as system clock
value: 0
- name: HSI16
- name: HSI
description: HSI selected as system clock
value: 1
- name: HSE
@ -2275,18 +2275,18 @@ enum/SWPMI1SEL:
variants:
- name: PCLK1
value: 0
- name: HSI16
- name: HSI
value: 1
enum/UART4SEL:
bit_size: 2
variants:
- name: PCLK
- name: PCLK1
description: PCLK clock selected
value: 0
- name: SYSCLK
- name: SYS
description: SYSCLK clock selected
value: 1
- name: HSI16
- name: HSI
description: HSI16 clock selected
value: 2
- name: LSE
@ -2295,13 +2295,13 @@ enum/UART4SEL:
enum/UART5SEL:
bit_size: 2
variants:
- name: PCLK
- name: PCLK1
description: PCLK clock selected
value: 0
- name: SYSCLK
- name: SYS
description: SYSCLK clock selected
value: 1
- name: HSI16
- name: HSI
description: HSI16 clock selected
value: 2
- name: LSE
@ -2310,13 +2310,13 @@ enum/UART5SEL:
enum/USART1SEL:
bit_size: 2
variants:
- name: PCLK
- name: PCLK1
description: PCLK clock selected
value: 0
- name: SYSCLK
- name: SYS
description: SYSCLK clock selected
value: 1
- name: HSI16
- name: HSI
description: HSI16 clock selected
value: 2
- name: LSE
@ -2325,13 +2325,13 @@ enum/USART1SEL:
enum/USART2SEL:
bit_size: 2
variants:
- name: PCLK
- name: PCLK1
description: PCLK clock selected
value: 0
- name: SYSCLK
- name: SYS
description: SYSCLK clock selected
value: 1
- name: HSI16
- name: HSI
description: HSI16 clock selected
value: 2
- name: LSE
@ -2340,13 +2340,13 @@ enum/USART2SEL:
enum/USART3SEL:
bit_size: 2
variants:
- name: PCLK
- name: PCLK1
description: PCLK clock selected
value: 0
- name: SYSCLK
- name: SYS
description: SYSCLK clock selected
value: 1
- name: HSI16
- name: HSI
description: HSI16 clock selected
value: 2
- name: LSE

96
data/registers/rcc_l4plus.yaml
View File

@ -1665,19 +1665,19 @@ fieldset/PLLSAICFGR:
enum/ADCSEL:
bit_size: 2
variants:
- name: Disable
- name: DISABLE
description: No clock selected
value: 0
- name: PLLADC1CLK
description: PLLADC1CLK clock selected
value: 1
- name: SYSCLK
- name: SYS
description: SYSCLK clock selected
value: 3
enum/ADFSDMSEL:
bit_size: 2
variants:
- name: SAI1
- name: PLLSAI1_P
description: SAI1clock selected as DFSDM audio clock
value: 0
- name: HSI
@ -1695,7 +1695,7 @@ enum/CLK48SEL:
- name: PLLSAI1_Q
description: PLLSAI1_Q aka PLL48M1CLK clock selected
value: 1
- name: PLL_Q
- name: PLL1_Q
description: PLL_Q aka PLL48M2CLK clock selected
value: 2
- name: MSI
@ -1707,7 +1707,7 @@ enum/DFSDMSEL:
- name: PCLK2
description: APB2 clock (PCLK2) selected as DFSDM kernel clock
value: 0
- name: SYSCLK
- name: SYS
description: System clock selected as DFSDM kernel clock
value: 1
enum/DSISEL:
@ -1752,61 +1752,61 @@ enum/HPRE:
enum/I2C1SEL:
bit_size: 2
variants:
- name: PCLK
- name: PCLK1
description: PCLK clock selected
value: 0
- name: SYSCLK
- name: SYS
description: SYSCLK clock selected
value: 1
- name: HSI16
- name: HSI
description: HSI16 clock selected
value: 2
enum/I2C2SEL:
bit_size: 2
variants:
- name: PCLK
- name: PCLK1
description: PCLK clock selected
value: 0
- name: SYSCLK
- name: SYS
description: SYSCLK clock selected
value: 1
- name: HSI16
- name: HSI
description: HSI16 clock selected
value: 2
enum/I2C3SEL:
bit_size: 2
variants:
- name: PCLK
- name: PCLK1
description: PCLK clock selected
value: 0
- name: SYSCLK
- name: SYS
description: SYSCLK clock selected
value: 1
- name: HSI16
- name: HSI
description: HSI16 clock selected
value: 2
enum/I2C4SEL:
bit_size: 2
variants:
- name: PCLK
- name: PCLK1
description: PCLK clock selected
value: 0
- name: SYSCLK
- name: SYS
description: SYSCLK clock selected
value: 1
- name: HSI16
- name: HSI
description: HSI16 clock selected
value: 2
enum/LPTIM1SEL:
bit_size: 2
variants:
- name: PCLK
- name: PCLK1
description: PCLK clock selected
value: 0
- name: LSI
description: LSI clock selected
value: 1
- name: HSI16
- name: HSI
description: HSI16 clock selected
value: 2
- name: LSE
@ -1815,13 +1815,13 @@ enum/LPTIM1SEL:
enum/LPTIM2SEL:
bit_size: 2
variants:
- name: PCLK
- name: PCLK1
description: PCLK clock selected
value: 0
- name: LSI
description: LSI clock selected
value: 1
- name: HSI16
- name: HSI
description: HSI16 clock selected
value: 2
- name: LSE
@ -1830,13 +1830,13 @@ enum/LPTIM2SEL:
enum/LPUART1SEL:
bit_size: 2
variants:
- name: PCLK
- name: PCLK1
description: PCLK clock selected
value: 0
- name: SYSCLK
- name: SYS
description: SYSCLK clock selected
value: 1
- name: HSI16
- name: HSI
description: HSI16 clock selected
value: 2
- name: LSE
@ -1887,16 +1887,16 @@ enum/MCOPRE:
enum/MCOSEL:
bit_size: 4
variants:
- name: Disable
- name: DISABLE
description: No clock
value: 0
- name: SYSCLK
- name: SYS
description: SYSCLK clock selected
value: 1
- name: MSI
description: MSI oscillator clock selected
value: 2
- name: HSI16
- name: HSI
description: HSI oscillator clock selected
value: 3
- name: HSE
@ -1965,7 +1965,7 @@ enum/MSIRGSEL:
enum/OSPISEL:
bit_size: 2
variants:
- name: SYSCLK
- name: SYS
description: System clock selected as OctoSPI kernel clock
value: 0
- name: MSI
@ -2353,7 +2353,7 @@ enum/PLLSRC:
- name: MSI
description: MSI selected as PLL input clock
value: 1
- name: HSI16
- name: HSI
description: HSI selected as PLL input clock
value: 2
- name: HSE
@ -2401,7 +2401,7 @@ enum/SAI1SEL:
- name: PLLSAI2_P
description: PLLSAI2CLK clock is selected as SAIx clock
value: 1
- name: PLL_P
- name: PLL1_P
description: PLLSAI3CLK clock is selected as SAIx clock
value: 2
- name: SAI1_EXTCLK
@ -2419,7 +2419,7 @@ enum/SAI2SEL:
- name: PLLSAI2_P
description: PLLSAI2CLK clock is selected as SAIx clock
value: 1
- name: PLL_P
- name: PLL1_P
description: PLLSAI3CLK clock is selected as SAIx clock
value: 2
- name: SAI2_EXTCLK
@ -2443,7 +2443,7 @@ enum/STOPWUCK:
- name: MSI
description: MSI oscillator selected as wake-up from Stop clock
value: 0
- name: HSI16
- name: HSI
description: HSI oscillator selected as wake-up from Stop clock
value: 1
enum/SW:
@ -2452,7 +2452,7 @@ enum/SW:
- name: MSI
description: MSI selected as system clock
value: 0
- name: HSI16
- name: HSI
description: HSI selected as system clock
value: 1
- name: HSE
@ -2464,13 +2464,13 @@ enum/SW:
enum/UART4SEL:
bit_size: 2
variants:
- name: PCLK
- name: PCLK1
description: PCLK clock selected
value: 0
- name: SYSCLK
- name: SYS
description: SYSCLK clock selected
value: 1
- name: HSI16
- name: HSI
description: HSI16 clock selected
value: 2
- name: LSE
@ -2479,13 +2479,13 @@ enum/UART4SEL:
enum/UART5SEL:
bit_size: 2
variants:
- name: PCLK
- name: PCLK1
description: PCLK clock selected
value: 0
- name: SYSCLK
- name: SYS
description: SYSCLK clock selected
value: 1
- name: HSI16
- name: HSI
description: HSI16 clock selected
value: 2
- name: LSE
@ -2494,13 +2494,13 @@ enum/UART5SEL:
enum/USART1SEL:
bit_size: 2
variants:
- name: PCLK
- name: PCLK1
description: PCLK clock selected
value: 0
- name: SYSCLK
- name: SYS
description: SYSCLK clock selected
value: 1
- name: HSI16
- name: HSI
description: HSI16 clock selected
value: 2
- name: LSE
@ -2509,13 +2509,13 @@ enum/USART1SEL:
enum/USART2SEL:
bit_size: 2
variants:
- name: PCLK
- name: PCLK1
description: PCLK clock selected
value: 0
- name: SYSCLK
- name: SYS
description: SYSCLK clock selected
value: 1
- name: HSI16
- name: HSI
description: HSI16 clock selected
value: 2
- name: LSE
@ -2524,13 +2524,13 @@ enum/USART2SEL:
enum/USART3SEL:
bit_size: 2
variants:
- name: PCLK
- name: PCLK1
description: PCLK clock selected
value: 0
- name: SYSCLK
- name: SYS
description: SYSCLK clock selected
value: 1
- name: HSI16
- name: HSI
description: HSI16 clock selected
value: 2
- name: LSE

32
stm32-data-gen/src/rcc.rs
View File

@ -16,7 +16,8 @@ impl PeripheralToClock {
pub fn parse(registers: &Registers) -> anyhow::Result<Self> {
let mut peripheral_to_clock = HashMap::new();
let checked_rccs = HashSet::from([
"c0", "f0", "f1", "f100", "f1c1", "f3", "f3_v2", "f7", "g0", "g4", "h5", "h50", "h7", "h7ab", "h7rm0433",
"c0", "f0", "f1", "f100", "f1c1", "f2", "f3", "f3_v2", "f4", "f410", "f7", "g0", "g4", "h5", "h50", "h7",
"h7ab", "h7rm0433", "l0", "l0_v2", "l1", "l4",
]);
let allowed_variants = HashSet::from([
"DISABLE",
@ -62,22 +63,18 @@ impl PeripheralToClock {
"HSI48",
"LSI",
"CSI",
"MSI",
"HSE",
"LSE",
"AUDIOCLK",
"PER",
// TODO: variants to cleanup
"SAI1_EXTCLK",
"SAI2_EXTCLK",
"B_0x0",
"B_0x1",
"PLL",
"PLLCLK",
"TIMPCLK",
"HSI_Div244",
"CSI_DIV_122",
"HSI16_Div488",
"HSI16_Div8",
"HCLK_DIV_8",
"HCLK1_DIV_8",
"RCC_PCLK_D3",
"I2S_CKIN",
"DAC_HOLD",
@ -85,6 +82,8 @@ impl PeripheralToClock {
"TIMPCLK",
"RTCCLK",
"RTC_WKUP",
"DSIPHY",
"PLLDSICLK",
]);
for (rcc_name, ir) in &registers.registers {
@ -131,7 +130,17 @@ impl PeripheralToClock {
};
for v in &enumm.variants {
if !allowed_variants.contains(v.name.as_str()) {
if let Some(captures) = regex!(r"^([A-Z0-9]+)_DIV_\d+?$").captures(v.name.as_str()) {
let name = captures.get(1).unwrap();
if !allowed_variants.contains(name.as_str()) {
return Err(anyhow!(
"rcc: prohibited variant name {} for rcc_{}",
v.name.as_str(),
rcc_name
));
}
} else if !allowed_variants.contains(v.name.as_str()) {
return Err(anyhow!(
"rcc: prohibited variant name {} for rcc_{}",
v.name.as_str(),
@ -237,7 +246,10 @@ impl PeripheralToClock {
let mux = family_muxes.get(peri).map(|peri| peri.clone());
let res = stm32_data_serde::chip::core::peripheral::Rcc {
clock: peri_clock,
clock: peri_clock
.to_ascii_lowercase()
.replace("ahb", "hclk")
.replace("apb", "pclk"),
enable: stm32_data_serde::chip::core::peripheral::rcc::Enable {
register: reg.to_ascii_lowercase(),
field: field.name.to_ascii_lowercase(),