usart: make v1 and v2 more consistent.

data/registers/usart_v1.yaml

@@ -60,7 +60,6 @@ fieldset/CR1:
       description: Send break
       bit_offset: 0
       bit_size: 1
-      enum: SBK
     - name: RWU
       description: Receiver wakeup
       bit_offset: 1
@@ -104,15 +103,15 @@ fieldset/CR1:
       bit_offset: 10
       bit_size: 1
     - name: WAKE
-      description: Wakeup method
+      description: Receiver wakeup method
       bit_offset: 11
       bit_size: 1
       enum: WAKE
-    - name: M
+    - name: M0
       description: Word length
       bit_offset: 12
       bit_size: 1
-      enum: M
+      enum: M0
     - name: UE
       description: USART enable
       bit_offset: 13
@@ -125,7 +124,7 @@ fieldset/CR2:
       bit_offset: 0
       bit_size: 4
     - name: LBDL
-      description: lin break detection length
+      description: Line break detection length
       bit_offset: 5
       bit_size: 1
       enum: LBDL
@@ -184,7 +183,6 @@ fieldset/CR3:
       description: Half-duplex selection
       bit_offset: 3
       bit_size: 1
-      enum: HDSEL
     - name: DMAR
       description: DMA enable receiver
       bit_offset: 6
@@ -255,7 +253,7 @@ fieldset/SR:
       bit_offset: 3
       bit_size: 1
     - name: IDLE
-      description: IDLE line detected
+      description: Idle line detected
       bit_offset: 4
       bit_size: 1
     - name: RXNE
@@ -300,15 +298,6 @@ enum/CPOL:
     - name: High
       description: Steady high value on CK pin outside transmission window
       value: 1
-enum/HDSEL:
-  bit_size: 1
-  variants:
-    - name: FullDuplex
-      description: Half duplex mode is not selected
-      value: 0
-    - name: HalfDuplex
-      description: Half duplex mode is selected
-      value: 1
 enum/IRLP:
   bit_size: 1
   variants:
@@ -321,20 +310,20 @@ enum/IRLP:
 enum/LBDL:
   bit_size: 1
   variants:
-    - name: LBDL10
+    - name: Bit10
       description: 10-bit break detection
       value: 0
-    - name: LBDL11
+    - name: Bit11
       description: 11-bit break detection
       value: 1
-enum/M:
+enum/M0:
   bit_size: 1
   variants:
-    - name: M8
+    - name: Bit8
-      description: 8 data bits
+      description: "1 start bit, 8 data bits, n stop bits"
       value: 0
-    - name: M9
+    - name: Bit9
-      description: 9 data bits
+      description: "1 start bit, 9 data bits, n stop bits"
       value: 1
 enum/PS:
   bit_size: 1
@@ -354,15 +343,6 @@ enum/RWU:
     - name: Mute
       description: Receiver in mute mode
       value: 1
-enum/SBK:
-  bit_size: 1
-  variants:
-    - name: NoBreak
-      description: No break character is transmitted
-      value: 0
-    - name: Break
-      description: Break character transmitted
-      value: 1
 enum/STOP:
   bit_size: 2
   variants:

data/registers/usart_v2.yaml

@@ -90,7 +90,7 @@ fieldset/CR1:
       bit_offset: 6
       bit_size: 1
     - name: TXEIE
-      description: interrupt enable
+      description: TXE interrupt enable
       bit_offset: 7
       bit_size: 1
     - name: PEIE
@@ -165,7 +165,7 @@ fieldset/CR2:
         stride: 0
       enum: ADDM
     - name: LBDL
-      description: LIN break detection length
+      description: Line break detection length
       bit_offset: 5
       bit_size: 1
       enum: LBDL
@@ -177,7 +177,6 @@ fieldset/CR2:
       description: Last bit clock pulse
       bit_offset: 8
       bit_size: 1
-      enum: LBCL
     - name: CPHA
       description: Clock phase
       bit_offset: 9
@@ -205,22 +204,18 @@ fieldset/CR2:
       description: Swap TX/RX pins
       bit_offset: 15
       bit_size: 1
-      enum: SWAP
     - name: RXINV
       description: RX pin active level inversion
       bit_offset: 16
       bit_size: 1
-      enum: RXINV
     - name: TXINV
       description: TX pin active level inversion
       bit_offset: 17
       bit_size: 1
-      enum: TXINV
     - name: DATAINV
       description: Binary data inversion
       bit_offset: 18
       bit_size: 1
-      enum: DATAINV
     - name: MSBFIRST
       description: Most significant bit first
       bit_offset: 19
@@ -263,7 +258,6 @@ fieldset/CR3:
       description: Half-duplex selection
       bit_offset: 3
       bit_size: 1
-      enum: HDSEL
     - name: NACK
       description: Smartcard NACK enable
       bit_offset: 4
@@ -356,8 +350,8 @@ fieldset/IXR:
       description: Framing error
       bit_offset: 1
       bit_size: 1
-    - name: NF
+    - name: NE
-      description: Noise detected flag
+      description: Noise error flag
       bit_offset: 2
       bit_size: 1
     - name: ORE
@@ -380,7 +374,7 @@ fieldset/IXR:
       description: Transmit data register empty
       bit_offset: 7
       bit_size: 1
-    - name: LBDF
+    - name: LBD
       description: LIN break detection flag
       bit_offset: 8
       bit_size: 1
@@ -424,6 +418,7 @@ fieldset/IXR:
       description: Receiver wakeup from Mute mode
       bit_offset: 19
       bit_size: 1
+      enum: RWU
     - name: WUF
       description: Wakeup from Stop mode flag
       bit_offset: 20
@@ -512,15 +507,6 @@ enum/CPOL:
     - name: High
       description: Steady high value on CK pin outside transmission window
       value: 1
-enum/DATAINV:
-  bit_size: 1
-  variants:
-    - name: Positive
-      description: Logical data from the data register are send/received in positive/direct logic
-      value: 0
-    - name: Negative
-      description: Logical data from the data register are send/received in negative/inverse logic
-      value: 1
 enum/DEP:
   bit_size: 1
   variants:
@@ -530,15 +516,6 @@ enum/DEP:
     - name: Low
       description: DE signal is active low
       value: 1
-enum/HDSEL:
-  bit_size: 1
-  variants:
-    - name: NotSelected
-      description: Half duplex mode is not selected
-      value: 0
-    - name: Selected
-      description: Half duplex mode is selected
-      value: 1
 enum/IRLP:
   bit_size: 1
   variants:
@@ -548,15 +525,6 @@ enum/IRLP:
     - name: LowPower
       description: Low-power mode
       value: 1
-enum/LBCL:
-  bit_size: 1
-  variants:
-    - name: NotOutput
-      description: The clock pulse of the last data bit is not output to the CK pin
-      value: 0
-    - name: Output
-      description: The clock pulse of the last data bit is output to the CK pin
-      value: 1
 enum/LBDL:
   bit_size: 1
   variants:
@@ -620,14 +588,14 @@ enum/PS:
     - name: Odd
       description: Odd parity
       value: 1
-enum/RXINV:
+enum/RWU:
   bit_size: 1
   variants:
-    - name: Standard
+    - name: Active
-      description: RX pin signal works using the standard logic levels
+      description: Receiver in active mode
       value: 0
-    - name: Inverted
+    - name: Mute
-      description: RX pin signal values are inverted
+      description: Receiver in mute mode
       value: 1
 enum/STOP:
   bit_size: 2
@@ -644,32 +612,14 @@ enum/STOP:
     - name: Stop1p5
       description: 1.5 stop bit
       value: 3
-enum/SWAP:
-  bit_size: 1
-  variants:
-    - name: Standard
-      description: TX/RX pins are used as defined in standard pinout
-      value: 0
-    - name: Swapped
-      description: The TX and RX pins functions are swapped
-      value: 1
-enum/TXINV:
-  bit_size: 1
-  variants:
-    - name: Standard
-      description: TX pin signal works using the standard logic levels
-      value: 0
-    - name: Inverted
-      description: TX pin signal values are inverted
-      value: 1
 enum/WAKE:
   bit_size: 1
   variants:
-    - name: Idle
+    - name: IdleLine
-      description: Idle line
+      description: USART wakeup on idle line
       value: 0
-    - name: Address
+    - name: AddressMark
-      description: Address mask
+      description: USART wakeup on address mark
       value: 1
 enum/WUS:
   bit_size: 2