diff --git a/data/registers/pwr_f2.yaml b/data/registers/pwr_f2.yaml new file mode 100644 index 0000000..c9ff8bd --- /dev/null +++ b/data/registers/pwr_f2.yaml @@ -0,0 +1,84 @@ +--- +block/PWR: + description: Power control + items: + - name: CR + description: power control register + byte_offset: 0 + fieldset: CR + - name: CSR + description: power control/status register + byte_offset: 4 + fieldset: CSR +fieldset/CR: + description: power control register + fields: + - name: LPDS + description: Low-power deep sleep + bit_offset: 0 + bit_size: 1 + - name: PDDS + description: Power down deepsleep + bit_offset: 1 + bit_size: 1 + enum: PDDS + - name: CWUF + description: Clear wakeup flag + bit_offset: 2 + bit_size: 1 + - name: CSBF + description: Clear standby flag + bit_offset: 3 + bit_size: 1 + - name: PVDE + description: Power voltage detector enable + bit_offset: 4 + bit_size: 1 + - name: PLS + description: PVD level selection + bit_offset: 5 + bit_size: 3 + - name: DBP + description: Disable backup domain write protection + bit_offset: 8 + bit_size: 1 + - name: FPDS + description: Flash power down in Stop mode + bit_offset: 9 + bit_size: 1 +fieldset/CSR: + description: power control/status register + fields: + - name: WUF + description: Wakeup flag + bit_offset: 0 + bit_size: 1 + - name: SBF + description: Standby flag + bit_offset: 1 + bit_size: 1 + - name: PVDO + description: PVD output + bit_offset: 2 + bit_size: 1 + - name: BRR + description: Backup regulator ready + bit_offset: 3 + bit_size: 1 + - name: EWUP + description: Enable WKUP pin + bit_offset: 8 + bit_size: 1 + - name: BRE + description: Backup regulator enable + bit_offset: 9 + bit_size: 1 +enum/PDDS: + bit_size: 1 + variants: + - name: STOP_MODE + description: Enter Stop mode when the CPU enters deepsleep + value: 0 + - name: STANDBY_MODE + description: Enter Standby mode when the CPU enters deepsleep + value: 1 diff --git a/stm32data/__main__.py b/stm32data/__main__.py index 1e86b02..caf0584 100755 --- a/stm32data/__main__.py +++ b/stm32data/__main__.py @@ -199,6 +199,7 @@ perimap = [ ('STM32G4.*:PWR:.*', ('pwr', 'g4', 'PWR')), ('STM32H7(42|43|53|50).*:PWR:.*', ('pwr', 'h7', 'PWR')), ('STM32H7.*:PWR:.*', ('pwr', 'h7smps', 'PWR')), + ('STM32F2.*:PWR:.*', ('pwr', 'f2', 'PWR')), ('STM32F3.*:PWR:.*', ('pwr', 'f3', 'PWR')), ('STM32F4.*:PWR:.*', ('pwr', 'f4', 'PWR')), ('STM32F7.*:PWR:.*', ('pwr', 'f7', 'PWR')),