guangzong/stm32-data
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Unarrayify TSEL

Browse Source
This commit is contained in:
chemicstry 2022-08-04 02:51:21 +03:00
parent e1f8e76781
commit f4bcbc9779
2 changed files with 20 additions and 16 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
data/registers/dac_v1.yaml
View File

@ -80,14 +80,6 @@ fieldset/CR:
array:
len: 2
stride: 16
- name: TSEL
description: DAC channel trigger selection
bit_offset: 3
bit_size: 3
array:
len: 2
stride: 16
enum: TSEL1
- name: WAVE
description: DAC channel noise/triangle wave generation enable
bit_offset: 6
@ -117,6 +109,16 @@ fieldset/CR:
array:
len: 2
stride: 16
- name: TSEL1
description: DAC channel 1 trigger selection
bit_offset: 3
bit_size: 3
enum: TSEL1
- name: TSEL2
description: DAC channel 2 trigger selection
bit_offset: 19
bit_size: 3
enum: TSEL2
fieldset/DHR12L:
description: channel 12-bit left-aligned data holding register
fields:

18
data/registers/dac_v2.yaml
View File

@ -107,14 +107,6 @@ fieldset/CR:
array:
len: 2
stride: 16
- name: TSEL
description: DAC channel trigger selection
bit_offset: 3
bit_size: 3
array:
len: 2
stride: 16
enum: TSEL1
- name: WAVE
description: DAC channel noise/triangle wave generation enable
bit_offset: 6
@ -151,6 +143,16 @@ fieldset/CR:
array:
len: 2
stride: 16
- name: TSEL1
description: DAC channel 1 trigger selection
bit_offset: 3
bit_size: 3
enum: TSEL1
- name: TSEL2
description: DAC channel 2 trigger selection
bit_offset: 19
bit_size: 3
enum: TSEL2
fieldset/DHR12L:
description: channel 12-bit left-aligned data holding register
fields: