update timer_v1

This commit is contained in:
eZio Pan 2024-02-13 21:03:22 +08:00 committed by Dario Nieuwenhuis
parent 1045313d2c
commit f2c85fb49c

View File

@ -1437,13 +1437,21 @@ fieldset/SMCR_2CH:
fields: fields:
- name: SMS - name: SMS
description: Slave mode selection description: Slave mode selection
bit_offset: 0 bit_offset:
bit_size: 3 - start: 0
end: 2
- start: 16
end: 16
bit_size: 4
enum: SMS enum: SMS
- name: TS - name: TS
description: Trigger selection description: Trigger selection
bit_offset: 4 bit_offset:
bit_size: 3 - start: 4
end: 6
- start: 20
end: 21
bit_size: 5
enum: TS enum: TS
- name: MSM - name: MSM
description: Master/Slave mode description: Master/Slave mode
@ -2040,10 +2048,10 @@ enum/OSSR:
description: When inactive, OC/OCN outputs are enabled with their inactive level description: When inactive, OC/OCN outputs are enabled with their inactive level
value: 1 value: 1
enum/SMS: enum/SMS:
bit_size: 3 bit_size: 4
variants: variants:
- name: Disabled - name: Disabled
description: Slave mode disabled - if CEN = 1 then the prescaler is clocked directly by the internal clock. description: Slave mode disabled - if CEN = '1' then the prescaler is clocked directly by the internal clock.
value: 0 value: 0
- name: Encoder_Mode_1 - name: Encoder_Mode_1
description: Encoder mode 1 - Counter counts up/down on TI2FP1 edge depending on TI1FP2 level. description: Encoder mode 1 - Counter counts up/down on TI2FP1 edge depending on TI1FP2 level.
@ -2066,6 +2074,9 @@ enum/SMS:
- name: Ext_Clock_Mode - name: Ext_Clock_Mode
description: External Clock Mode 1 - Rising edges of the selected trigger (TRGI) clock the counter. description: External Clock Mode 1 - Rising edges of the selected trigger (TRGI) clock the counter.
value: 7 value: 7
- name: Combined_Reset_Trigger
description: Rising edge of the selected trigger input (tim_trgi) reinitializes the counter, generates an update of the registers and starts the counter.
value: 8
enum/TI1S: enum/TI1S:
bit_size: 1 bit_size: 1
variants: variants:
@ -2076,31 +2087,31 @@ enum/TI1S:
description: The TIMx_CH1, CH2, CH3 pins are connected to TI1 input description: The TIMx_CH1, CH2, CH3 pins are connected to TI1 input
value: 1 value: 1
enum/TS: enum/TS:
bit_size: 3 bit_size: 5
variants: variants:
- name: ITR0 - name: ITR0
description: Internal Trigger 0 (ITR0) description: Internal Trigger 0
value: 0 value: 0
- name: ITR1 - name: ITR1
description: Internal Trigger 1 (ITR1) description: Internal Trigger 1
value: 1 value: 1
- name: ITR2 - name: ITR2
description: Internal Trigger 2 (ITR2) description: Internal Trigger 2
value: 2 value: 2
- name: ITR3 - name: ITR3
description: Internal Trigger 3 (ITR3) description: Internal Trigger 3
value: 3 value: 3
- name: TI1F_ED - name: TI1F_ED
description: TI1 Edge Detector (TI1F_ED) description: TI1 Edge Detector
value: 4 value: 4
- name: TI1FP1 - name: TI1FP1
description: Filtered Timer Input 1 (TI1FP1) description: Filtered Timer Input 1
value: 5 value: 5
- name: TI2FP2 - name: TI2FP2
description: Filtered Timer Input 2 (TI2FP2) description: Filtered Timer Input 2
value: 6 value: 6
- name: ETRF - name: ETRF
description: External Trigger input (ETRF) description: External Trigger input
value: 7 value: 7
enum/URS: enum/URS:
bit_size: 1 bit_size: 1