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tailoring from adv to gp16

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This commit is contained in:
eZio Pan 2024-01-20 15:03:04 +08:00
parent 033aaaecb3
commit ee78a5d925
1 changed files with 0 additions and 422 deletions
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data/registers/timgp16_v2.yaml
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@ -67,26 +67,6 @@ block/TIM:
stride: 4
byte_offset: 52
fieldset: CCR
- name: BDTR
description: break and dead-time register
byte_offset: 68
fieldset: BDTR
- name: CCR5
description: capture/compare register 5
byte_offset: 72
fieldset: CCR5
- name: CCR6
description: capture/compare register 6
byte_offset: 76
fieldset: CCR
- name: CCMR3
description: capture/compare mode register 3
byte_offset: 80
fieldset: CCMR3
- name: DTR2
description: break and dead-time register
byte_offset: 84
fieldset: DTR2
- name: ECR
description: encoder control register
byte_offset: 88
@ -114,30 +94,6 @@ block/TIM:
fieldset/AF1:
description: alternate function register 1
fields:
- name: BKINE
description: TIMx_BKIN input enable
bit_offset: 0
bit_size: 1
- name: BKCMPE
description: TIM_BRK_CMPx (x=1-8) enable
bit_offset: 1
bit_size: 1
array:
len: 1
stride: 8
- name: BKINP
description: TIMx_BKIN input polarity
bit_offset: 9
bit_size: 1
enum: BKINP
- name: BKCMPP
description: TIM_BRK_CMPx (x=1-4) input polarity
bit_offset: 10
bit_size: 1
array:
len: 1
stride: 4
enum: BKINP
- name: ETRSEL
description: etr_in source selection
bit_offset: 14
@ -145,30 +101,6 @@ fieldset/AF1:
fieldset/AF2:
description: alternate function register 2
fields:
- name: BK2INE
description: TIMx_BKIN2 input enable
bit_offset: 0
bit_size: 1
- name: BK2CMPE
description: TIM_BRK2_CMPx (x=1-8) enable
bit_offset: 1
bit_size: 1
array:
len: 1
stride: 8
- name: BK2INP
description: TIMx_BK2IN input polarity
bit_offset: 9
bit_size: 1
enum: BKINP
- name: BK2CMPP
description: TIM_BRK2_CMPx (x=1-4) input polarity
bit_offset: 10
bit_size: 1
array:
len: 1
stride: 4
enum: BKINP
- name: OCRSEL
description: ocref_clr source selection
bit_offset: 16
@ -184,75 +116,6 @@ fieldset/ARR:
description: Auto-reload value (Dither mode enabled)
bit_offset: 0
bit_size: 20
fieldset/BDTR:
description: break and dead-time register
fields:
- name: DTG
description: Dead-time generator setup
bit_offset: 0
bit_size: 8
- name: LOCK
description: Lock configuration
bit_offset: 8
bit_size: 2
enum: LOCK
- name: OSSI
description: Off-state selection for Idle mode
bit_offset: 10
bit_size: 1
enum: OSSI
- name: OSSR
description: Off-state selection for Run mode
bit_offset: 11
bit_size: 1
enum: OSSR
- name: BKE
description: Break x (x=1,2) enable
bit_offset: 12
bit_size: 1
array:
len: 2
stride: 12
- name: BKP
description: Break x (x=1,2) polarity
bit_offset: 13
bit_size: 1
array:
len: 2
stride: 12
enum: BKP
- name: AOE
description: Automatic output enable
bit_offset: 14
bit_size: 1
- name: MOE
description: Main output enable
bit_offset: 15
bit_size: 1
- name: BKF
description: Break x (x=1,2) filter
bit_offset: 16
bit_size: 4
array:
len: 2
stride: 4
enum: FilterValue
- name: BKDSRM
description: Break Disarm
bit_offset: 26
bit_size: 1
array:
len: 2
stride: 1
enum: BKDSRM
- name: BKBID
description: Break bidirectional
bit_offset: 28
bit_size: 1
array:
len: 2
stride: 1
enum: BKBID
fieldset/CCER:
description: capture/compare enable register
fields:
@ -270,13 +133,6 @@ fieldset/CCER:
array:
len: 6
stride: 4
- name: CCNE
description: Capture/Compare x (x=1-4) complementary output enable
bit_offset: 2
bit_size: 1
array:
len: 4
stride: 4
- name: CCNP
description: Capture/Compare x (x=1-4) output Polarity
bit_offset: 3
@ -284,38 +140,6 @@ fieldset/CCER:
array:
len: 4
stride: 4
fieldset/CCMR3:
description: capture/compare mode register 3
fields:
- name: OCFE
description: Output compare x (x=5,6) fast enable
bit_offset: 2
bit_size: 1
array:
len: 2
stride: 8
- name: OCPE
description: Output compare x (x=5,6) preload enable
bit_offset: 3
bit_size: 1
array:
len: 2
stride: 8
- name: OCM
description: Output compare x (x=5,6) mode
bit_offset: 4
bit_size: 3
array:
len: 2
stride: 8
enum: OCM
- name: OCCE
description: Output compare x (x=5,6) clear enable
bit_offset: 7
bit_size: 1
array:
len: 2
stride: 8
fieldset/CCMR_Input:
description: capture/compare mode register x (x=1-2) (input mode)
fields:
@ -401,18 +225,6 @@ fieldset/CCR:
description: Input capture x (x=1-4,6) value (Dither mode enabled)
bit_offset: 4
bit_size: 16
fieldset/CCR5:
extends: CCR
description: capture/compare register 5
fields:
- name: GC5C
description: Group channel 5 and channel x (x=1-3)
bit_offset: 29
bit_size: 1
array:
len: 3
stride: 1
enum: GC5C
fieldset/CNT:
description: counter
fields:
@ -474,14 +286,6 @@ fieldset/CR1:
fieldset/CR2:
description: control register 2
fields:
- name: CCPC
description: Capture/compare preloaded control
bit_offset: 0
bit_size: 1
- name: CCUS
description: Capture/compare control update selection
bit_offset: 2
bit_size: 1
- name: CCDS
description: Capture/compare DMA selection
bit_offset: 3
@ -497,26 +301,6 @@ fieldset/CR2:
bit_offset: 7
bit_size: 1
enum: TI1S
- name: OIS
description: Output Idle state 1(N)-4(N)
bit_offset: 8
bit_size: 1
array:
len: 4
stride: 2
- name: OIS5
description: Output Idle state 5
bit_offset: 16
bit_size: 1
- name: OIS6
description: Output Idle state 6
bit_offset: 18
bit_size: 1
- name: MMS2
description: Master mode selection 2
bit_offset: 20
bit_size: 4
enum: MMS2
fieldset/DCR:
description: DMA control register
fields:
@ -547,10 +331,6 @@ fieldset/DIER:
array:
len: 4
stride: 1
- name: COMIE
description: COM interrupt enable
bit_offset: 5
bit_size: 1
- name: TIE
description: Trigger interrupt enable
bit_offset: 6
@ -570,10 +350,6 @@ fieldset/DIER:
array:
len: 4
stride: 1
- name: COMDE
description: COM DMA request enable
bit_offset: 13
bit_size: 1
- name: TDE
description: Trigger DMA request enable
bit_offset: 14
@ -601,22 +377,6 @@ fieldset/DMAR:
description: DMA register for burst accesses
bit_offset: 0
bit_size: 32
fieldset/DTR2:
description: deadtime register 2
fields:
- name: DTGF
description: Dead-time falling edge generator setup
bit_offset: 0
bit_size: 8
- name: DTAE
description: Deadtime asymmetric enable
bit_offset: 16
bit_size: 1
enum: DTAE
- name: DTPE
description: Deadtime preload enable
bit_offset: 17
bit_size: 1
fieldset/ECR:
description: encoder control register
fields:
@ -665,21 +425,10 @@ fieldset/EGR:
array:
len: 4
stride: 1
- name: COMG
description: Capture/Compare control update generation
bit_offset: 5
bit_size: 1
- name: TG
description: Trigger generation
bit_offset: 6
bit_size: 1
- name: BG
description: Break x (x=1-2) generation
bit_offset: 7
bit_size: 1
array:
len: 2
stride: 1
fieldset/PSC:
description: prescaler
fields:
@ -702,11 +451,6 @@ fieldset/SMCR:
bit_offset: 0
bit_size: 3
enum: SMS
- name: OCCS
description: OCREF clear selection
bit_offset: 3
bit_size: 1
enum: OCCS
- name: TS
description: Trigger selection
bit_offset: 4
@ -759,21 +503,10 @@ fieldset/SR:
array:
len: 4
stride: 1
- name: COMIF
description: COM interrupt flag
bit_offset: 5
bit_size: 1
- name: TIF
description: Trigger interrupt flag
bit_offset: 6
bit_size: 1
- name: BIF
description: Break x (x=1,2) interrupt flag
bit_offset: 7
bit_size: 1
array:
len: 2
stride: 1
- name: CCOF
description: Capture/Compare x (x=1-4) overcapture flag
bit_offset: 9
@ -781,14 +514,6 @@ fieldset/SR:
array:
len: 4
stride: 1
- name: CCIF5
description: Capture/compare 5 interrupt flag
bit_offset: 16
bit_size: 1
- name: CCIF6
description: Capture/compare 6 interrupt flag
bit_offset: 16
bit_size: 1
- name: IDXIF
description: Index interrupt flag
bit_offset: 20
@ -815,42 +540,6 @@ fieldset/TISEL:
array:
len: 4
stride: 8
enum/BKBID:
bit_size: 1
variants:
- name: Input
description: Break input tim_brk in input mode
value: 0
- name: Bidirectional
description: Break input tim_brk in bidirectional mode
value: 1
enum/BKDSRM:
bit_size: 1
variants:
- name: Armed
description: Break input tim_brk is armed
value: 0
- name: Disarmed
description: Break input tim_brk is disarmed
value: 1
enum/BKINP:
bit_size: 1
variants:
- name: NotInverted
description: input polarity is not inverted (active low if BKxP = 0, active high if BKxP = 1)
value: 0
- name: Inverted
description: input polarity is inverted (active high if BKxP = 0, active low if BKxP = 1)
value: 1
enum/BKP:
bit_size: 1
variants:
- name: ActiveLow
description: Break input tim_brk is active low
value: 0
- name: ActiveHigh
description: Break input tim_brk is active high
value: 1
enum/CCDS:
bit_size: 1
variants:
@ -938,15 +627,6 @@ enum/DIR:
- name: Down
description: Counter used as downcounter
value: 1
enum/DTAE:
bit_size: 1
variants:
- name: Identical
description: Deadtime on rising and falling edges are identical, and defined with DTG[7:0] register
value: 0
- name: Distinct
description: Deadtime on rising edge is defined with DTG[7:0] register and deadtime on falling edge is defined with DTGF[7:0] bits.
value: 1
enum/ETP:
bit_size: 1
variants:
@ -1031,15 +711,6 @@ enum/FilterValue:
- name: FDTS_Div32_N8
description: fSAMPLING=fDTS/32, N=8
value: 15
enum/GC5C:
bit_size: 1
variants:
- name: NoEffect
description: No effect of TIM_OC5REF on TIM_OCxREFC (x=1-3)
value: 0
- name: LogicalAND
description: TIM_OCxREFC is the logical AND of TIM_OCxREF and TIM_OC5REF
value: 1
enum/IBLK:
bit_size: 2
variants:
@ -1064,21 +735,6 @@ enum/IDIR:
- name: Down
description: Index resets the counter when down-counting only
value: 2
enum/LOCK:
bit_size: 2
variants:
- name: Disabled
description: No bit is write protected
value: 0
- name: Level1
description: DTG bits in TIMx_BDTR register, OISx and OISxN bits in TIMx_CR2 register and BKBID/BKE/BKP/AOE bits in TIMx_BDTR register can no longer be written
value: 1
- name: Level2
description: LOCK Level 1 + CC Polarity bits (CCxP/CCxNP bits in TIMx_CCER register, as long as the related channel is configured in output through the CCxS bits) as well as OSSR and OSSI bits can no longer be written.
value: 2
- name: Level3
description: LOCK Level 2 + CC Control bits (OCxM and OCxPE bits in TIMx_CCMRx registers, as long as the related channel is configured in output through the CCxS bits) can no longer be written.
value: 3
enum/MMS:
bit_size: 3
variants:
@ -1106,57 +762,6 @@ enum/MMS:
- name: CompareOC4
description: OC4REF signal is used as trigger output
value: 7
enum/MMS2:
bit_size: 4
variants:
- name: Reset
description: The UG bit from the TIMx_EGR register is used as TRGO2
value: 0
- name: Enable
description: The counter enable signal, CNT_EN, is used as TRGO2
value: 1
- name: Update
description: The update event is selected as TRGO2
value: 2
- name: ComparePulse
description: TRGO2 send a positive pulse when the CC1IF flag it to be set, as soon as a capture or a compare match occurred
value: 3
- name: CompareOC1
description: OC1REF signal is used as TRGO2
value: 4
- name: CompareOC2
description: OC2REF signal is used as TRGO2
value: 5
- name: CompareOC3
description: OC3REF signal is used as TRGO2
value: 6
- name: CompareOC4
description: OC4REF signal is used as TRGO2
value: 7
- name: CompareOC5
description: OC5REF signal is used as TRGO2
value: 8
- name: CompareOC6
description: OC6REF signal is used as TRGO2
value: 9
- name: ComparePulse_OC4
description: OC4REF rising or falling edges generate pulses on TRGO2
value: 10
- name: ComparePulse_OC6
description: OC6REF rising or falling edges generate pulses on TRGO2
value: 11
- name: ComparePulse_OC4_Or_OC6_Rising
description: OC4REF or OC6REF rising edges generate pulses on TRGO2
value: 12
- name: ComparePulse_OC4_Rising_Or_OC6_Falling
description: OC4REF rising or OC6REF falling edges generate pulses on TRGO2
value: 13
- name: ComparePulse_OC5_Or_OC6_Rising
description: OC5REF or OC6REF rising edges generate pulses on TRGO2
value: 14
- name: ComparePulse_OC5_Rising_Or_OC6_Falling
description: OC5REF rising or OC6REF falling edges generate pulses on TRGO2
value: 15
enum/MSM:
bit_size: 1
variants:
@ -1166,15 +771,6 @@ enum/MSM:
- name: Sync
description: The effect of an event on the trigger input (TRGI) is delayed to allow a perfect synchronization between the current timer and its slaves (through TRGO). It is useful if we want to synchronize several timers on a single external event.
value: 1
enum/OCCS:
bit_size: 1
variants:
- name: Input
description: tim_ocref_clr_int is connected to the tim_ocref_clr input
value: 0
- name: ETRF
description: tim_ocref_clr_int is connected to tim_etrf
value: 1
enum/OCM:
bit_size: 3
variants:
@ -1202,24 +798,6 @@ enum/OCM:
- name: PwmMode2
description: Inversely to PwmMode1
value: 7
enum/OSSI:
bit_size: 1
variants:
- name: Disabled
description: When inactive, OC/OCN outputs are disabled
value: 0
- name: IdleLevel
description: When inactive, OC/OCN outputs are forced to idle level
value: 1
enum/OSSR:
bit_size: 1
variants:
- name: Disabled
description: When inactive, OC/OCN outputs are disabled
value: 0
- name: IdleLevel
description: When inactive, OC/OCN outputs are enabled with their inactive level
value: 1
enum/SMS:
bit_size: 3
variants: