tailoring from adv to gp16
This commit is contained in:
eZio Pan
parent
033aaaecb3
commit
ee78a5d925
@ -67,26 +67,6 @@ block/TIM:
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stride: 4
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stride: 4
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byte_offset: 52
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byte_offset: 52
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fieldset: CCR
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fieldset: CCR
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- name: BDTR
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description: break and dead-time register
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byte_offset: 68
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fieldset: BDTR
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- name: CCR5
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description: capture/compare register 5
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byte_offset: 72
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fieldset: CCR5
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- name: CCR6
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description: capture/compare register 6
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byte_offset: 76
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fieldset: CCR
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- name: CCMR3
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description: capture/compare mode register 3
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byte_offset: 80
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fieldset: CCMR3
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- name: DTR2
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description: break and dead-time register
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byte_offset: 84
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fieldset: DTR2
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- name: ECR
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- name: ECR
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description: encoder control register
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description: encoder control register
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byte_offset: 88
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byte_offset: 88
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@ -114,30 +94,6 @@ block/TIM:
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fieldset/AF1:
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fieldset/AF1:
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description: alternate function register 1
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description: alternate function register 1
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fields:
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fields:
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- name: BKINE
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description: TIMx_BKIN input enable
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bit_offset: 0
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bit_size: 1
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- name: BKCMPE
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description: TIM_BRK_CMPx (x=1-8) enable
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bit_offset: 1
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bit_size: 1
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array:
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len: 1
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stride: 8
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- name: BKINP
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description: TIMx_BKIN input polarity
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bit_offset: 9
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bit_size: 1
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enum: BKINP
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- name: BKCMPP
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description: TIM_BRK_CMPx (x=1-4) input polarity
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bit_offset: 10
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bit_size: 1
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array:
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len: 1
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stride: 4
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enum: BKINP
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- name: ETRSEL
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- name: ETRSEL
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description: etr_in source selection
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description: etr_in source selection
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bit_offset: 14
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bit_offset: 14
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@ -145,30 +101,6 @@ fieldset/AF1:
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fieldset/AF2:
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fieldset/AF2:
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description: alternate function register 2
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description: alternate function register 2
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fields:
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fields:
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- name: BK2INE
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description: TIMx_BKIN2 input enable
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bit_offset: 0
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bit_size: 1
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- name: BK2CMPE
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description: TIM_BRK2_CMPx (x=1-8) enable
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bit_offset: 1
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bit_size: 1
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array:
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len: 1
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stride: 8
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- name: BK2INP
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description: TIMx_BK2IN input polarity
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bit_offset: 9
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bit_size: 1
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enum: BKINP
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- name: BK2CMPP
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description: TIM_BRK2_CMPx (x=1-4) input polarity
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bit_offset: 10
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bit_size: 1
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array:
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len: 1
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stride: 4
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enum: BKINP
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- name: OCRSEL
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- name: OCRSEL
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description: ocref_clr source selection
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description: ocref_clr source selection
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bit_offset: 16
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bit_offset: 16
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@ -184,75 +116,6 @@ fieldset/ARR:
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description: Auto-reload value (Dither mode enabled)
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description: Auto-reload value (Dither mode enabled)
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bit_offset: 0
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bit_offset: 0
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bit_size: 20
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bit_size: 20
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fieldset/BDTR:
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description: break and dead-time register
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fields:
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- name: DTG
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description: Dead-time generator setup
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bit_offset: 0
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bit_size: 8
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- name: LOCK
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description: Lock configuration
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bit_offset: 8
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bit_size: 2
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enum: LOCK
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- name: OSSI
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description: Off-state selection for Idle mode
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bit_offset: 10
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bit_size: 1
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enum: OSSI
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- name: OSSR
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description: Off-state selection for Run mode
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bit_offset: 11
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bit_size: 1
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enum: OSSR
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- name: BKE
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description: Break x (x=1,2) enable
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bit_offset: 12
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bit_size: 1
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array:
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len: 2
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stride: 12
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- name: BKP
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description: Break x (x=1,2) polarity
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bit_offset: 13
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bit_size: 1
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array:
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len: 2
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stride: 12
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enum: BKP
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- name: AOE
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description: Automatic output enable
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bit_offset: 14
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bit_size: 1
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- name: MOE
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description: Main output enable
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bit_offset: 15
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bit_size: 1
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- name: BKF
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description: Break x (x=1,2) filter
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bit_offset: 16
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bit_size: 4
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array:
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len: 2
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stride: 4
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enum: FilterValue
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- name: BKDSRM
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description: Break Disarm
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bit_offset: 26
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bit_size: 1
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array:
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len: 2
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stride: 1
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enum: BKDSRM
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- name: BKBID
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description: Break bidirectional
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bit_offset: 28
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bit_size: 1
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array:
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len: 2
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stride: 1
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enum: BKBID
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fieldset/CCER:
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fieldset/CCER:
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description: capture/compare enable register
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description: capture/compare enable register
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fields:
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fields:
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@ -270,13 +133,6 @@ fieldset/CCER:
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array:
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array:
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len: 6
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len: 6
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stride: 4
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stride: 4
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- name: CCNE
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description: Capture/Compare x (x=1-4) complementary output enable
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bit_offset: 2
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bit_size: 1
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array:
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len: 4
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stride: 4
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- name: CCNP
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- name: CCNP
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description: Capture/Compare x (x=1-4) output Polarity
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description: Capture/Compare x (x=1-4) output Polarity
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bit_offset: 3
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bit_offset: 3
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@ -284,38 +140,6 @@ fieldset/CCER:
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array:
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array:
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len: 4
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len: 4
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stride: 4
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stride: 4
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fieldset/CCMR3:
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description: capture/compare mode register 3
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fields:
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- name: OCFE
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description: Output compare x (x=5,6) fast enable
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bit_offset: 2
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bit_size: 1
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array:
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len: 2
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stride: 8
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- name: OCPE
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description: Output compare x (x=5,6) preload enable
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bit_offset: 3
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bit_size: 1
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array:
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len: 2
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stride: 8
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- name: OCM
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description: Output compare x (x=5,6) mode
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bit_offset: 4
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bit_size: 3
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array:
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len: 2
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stride: 8
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enum: OCM
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- name: OCCE
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description: Output compare x (x=5,6) clear enable
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bit_offset: 7
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bit_size: 1
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array:
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len: 2
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stride: 8
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fieldset/CCMR_Input:
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fieldset/CCMR_Input:
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description: capture/compare mode register x (x=1-2) (input mode)
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description: capture/compare mode register x (x=1-2) (input mode)
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fields:
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fields:
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@ -401,18 +225,6 @@ fieldset/CCR:
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description: Input capture x (x=1-4,6) value (Dither mode enabled)
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description: Input capture x (x=1-4,6) value (Dither mode enabled)
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bit_offset: 4
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bit_offset: 4
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bit_size: 16
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bit_size: 16
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fieldset/CCR5:
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extends: CCR
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description: capture/compare register 5
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fields:
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- name: GC5C
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description: Group channel 5 and channel x (x=1-3)
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bit_offset: 29
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bit_size: 1
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array:
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len: 3
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stride: 1
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enum: GC5C
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fieldset/CNT:
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fieldset/CNT:
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description: counter
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description: counter
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fields:
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fields:
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@ -474,14 +286,6 @@ fieldset/CR1:
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fieldset/CR2:
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fieldset/CR2:
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description: control register 2
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description: control register 2
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fields:
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fields:
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- name: CCPC
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description: Capture/compare preloaded control
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bit_offset: 0
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bit_size: 1
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- name: CCUS
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description: Capture/compare control update selection
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bit_offset: 2
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bit_size: 1
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- name: CCDS
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- name: CCDS
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description: Capture/compare DMA selection
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description: Capture/compare DMA selection
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bit_offset: 3
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bit_offset: 3
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@ -497,26 +301,6 @@ fieldset/CR2:
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bit_offset: 7
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bit_offset: 7
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bit_size: 1
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bit_size: 1
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enum: TI1S
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enum: TI1S
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- name: OIS
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description: Output Idle state 1(N)-4(N)
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bit_offset: 8
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bit_size: 1
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array:
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len: 4
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stride: 2
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- name: OIS5
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description: Output Idle state 5
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bit_offset: 16
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bit_size: 1
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- name: OIS6
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description: Output Idle state 6
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bit_offset: 18
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bit_size: 1
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- name: MMS2
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description: Master mode selection 2
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bit_offset: 20
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bit_size: 4
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enum: MMS2
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fieldset/DCR:
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fieldset/DCR:
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description: DMA control register
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description: DMA control register
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fields:
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fields:
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@ -547,10 +331,6 @@ fieldset/DIER:
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array:
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array:
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len: 4
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len: 4
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stride: 1
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stride: 1
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- name: COMIE
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description: COM interrupt enable
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bit_offset: 5
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bit_size: 1
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- name: TIE
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- name: TIE
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description: Trigger interrupt enable
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description: Trigger interrupt enable
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bit_offset: 6
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bit_offset: 6
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@ -570,10 +350,6 @@ fieldset/DIER:
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array:
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array:
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len: 4
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len: 4
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stride: 1
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stride: 1
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- name: COMDE
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description: COM DMA request enable
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bit_offset: 13
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bit_size: 1
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- name: TDE
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- name: TDE
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description: Trigger DMA request enable
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description: Trigger DMA request enable
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bit_offset: 14
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bit_offset: 14
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@ -601,22 +377,6 @@ fieldset/DMAR:
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description: DMA register for burst accesses
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description: DMA register for burst accesses
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bit_offset: 0
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bit_offset: 0
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bit_size: 32
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bit_size: 32
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fieldset/DTR2:
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description: deadtime register 2
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fields:
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- name: DTGF
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description: Dead-time falling edge generator setup
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bit_offset: 0
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bit_size: 8
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- name: DTAE
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description: Deadtime asymmetric enable
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bit_offset: 16
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bit_size: 1
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enum: DTAE
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- name: DTPE
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description: Deadtime preload enable
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bit_offset: 17
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bit_size: 1
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fieldset/ECR:
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fieldset/ECR:
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description: encoder control register
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description: encoder control register
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fields:
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fields:
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@ -665,21 +425,10 @@ fieldset/EGR:
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array:
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array:
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len: 4
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len: 4
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stride: 1
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stride: 1
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- name: COMG
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description: Capture/Compare control update generation
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bit_offset: 5
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bit_size: 1
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- name: TG
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- name: TG
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description: Trigger generation
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description: Trigger generation
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bit_offset: 6
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bit_offset: 6
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bit_size: 1
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bit_size: 1
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- name: BG
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description: Break x (x=1-2) generation
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bit_offset: 7
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bit_size: 1
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array:
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len: 2
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stride: 1
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fieldset/PSC:
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fieldset/PSC:
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description: prescaler
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description: prescaler
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fields:
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fields:
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@ -702,11 +451,6 @@ fieldset/SMCR:
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bit_offset: 0
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bit_offset: 0
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bit_size: 3
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bit_size: 3
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enum: SMS
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enum: SMS
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- name: OCCS
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description: OCREF clear selection
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bit_offset: 3
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bit_size: 1
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enum: OCCS
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- name: TS
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- name: TS
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description: Trigger selection
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description: Trigger selection
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bit_offset: 4
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bit_offset: 4
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@ -759,21 +503,10 @@ fieldset/SR:
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array:
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array:
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len: 4
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len: 4
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stride: 1
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stride: 1
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- name: COMIF
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description: COM interrupt flag
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bit_offset: 5
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bit_size: 1
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- name: TIF
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- name: TIF
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description: Trigger interrupt flag
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description: Trigger interrupt flag
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bit_offset: 6
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bit_offset: 6
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bit_size: 1
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bit_size: 1
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- name: BIF
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description: Break x (x=1,2) interrupt flag
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bit_offset: 7
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bit_size: 1
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array:
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len: 2
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stride: 1
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- name: CCOF
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- name: CCOF
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description: Capture/Compare x (x=1-4) overcapture flag
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description: Capture/Compare x (x=1-4) overcapture flag
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bit_offset: 9
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bit_offset: 9
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@ -781,14 +514,6 @@ fieldset/SR:
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array:
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array:
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len: 4
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len: 4
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stride: 1
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stride: 1
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- name: CCIF5
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description: Capture/compare 5 interrupt flag
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bit_offset: 16
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bit_size: 1
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- name: CCIF6
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description: Capture/compare 6 interrupt flag
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bit_offset: 16
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bit_size: 1
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- name: IDXIF
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- name: IDXIF
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description: Index interrupt flag
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description: Index interrupt flag
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bit_offset: 20
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bit_offset: 20
|
||||||
@ -815,42 +540,6 @@ fieldset/TISEL:
|
|||||||
array:
|
array:
|
||||||
len: 4
|
len: 4
|
||||||
stride: 8
|
stride: 8
|
||||||
enum/BKBID:
|
|
||||||
bit_size: 1
|
|
||||||
variants:
|
|
||||||
- name: Input
|
|
||||||
description: Break input tim_brk in input mode
|
|
||||||
value: 0
|
|
||||||
- name: Bidirectional
|
|
||||||
description: Break input tim_brk in bidirectional mode
|
|
||||||
value: 1
|
|
||||||
enum/BKDSRM:
|
|
||||||
bit_size: 1
|
|
||||||
variants:
|
|
||||||
- name: Armed
|
|
||||||
description: Break input tim_brk is armed
|
|
||||||
value: 0
|
|
||||||
- name: Disarmed
|
|
||||||
description: Break input tim_brk is disarmed
|
|
||||||
value: 1
|
|
||||||
enum/BKINP:
|
|
||||||
bit_size: 1
|
|
||||||
variants:
|
|
||||||
- name: NotInverted
|
|
||||||
description: input polarity is not inverted (active low if BKxP = 0, active high if BKxP = 1)
|
|
||||||
value: 0
|
|
||||||
- name: Inverted
|
|
||||||
description: input polarity is inverted (active high if BKxP = 0, active low if BKxP = 1)
|
|
||||||
value: 1
|
|
||||||
enum/BKP:
|
|
||||||
bit_size: 1
|
|
||||||
variants:
|
|
||||||
- name: ActiveLow
|
|
||||||
description: Break input tim_brk is active low
|
|
||||||
value: 0
|
|
||||||
- name: ActiveHigh
|
|
||||||
description: Break input tim_brk is active high
|
|
||||||
value: 1
|
|
||||||
enum/CCDS:
|
enum/CCDS:
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
variants:
|
variants:
|
||||||
@ -938,15 +627,6 @@ enum/DIR:
|
|||||||
- name: Down
|
- name: Down
|
||||||
description: Counter used as downcounter
|
description: Counter used as downcounter
|
||||||
value: 1
|
value: 1
|
||||||
enum/DTAE:
|
|
||||||
bit_size: 1
|
|
||||||
variants:
|
|
||||||
- name: Identical
|
|
||||||
description: Deadtime on rising and falling edges are identical, and defined with DTG[7:0] register
|
|
||||||
value: 0
|
|
||||||
- name: Distinct
|
|
||||||
description: Deadtime on rising edge is defined with DTG[7:0] register and deadtime on falling edge is defined with DTGF[7:0] bits.
|
|
||||||
value: 1
|
|
||||||
enum/ETP:
|
enum/ETP:
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
variants:
|
variants:
|
||||||
@ -1031,15 +711,6 @@ enum/FilterValue:
|
|||||||
- name: FDTS_Div32_N8
|
- name: FDTS_Div32_N8
|
||||||
description: fSAMPLING=fDTS/32, N=8
|
description: fSAMPLING=fDTS/32, N=8
|
||||||
value: 15
|
value: 15
|
||||||
enum/GC5C:
|
|
||||||
bit_size: 1
|
|
||||||
variants:
|
|
||||||
- name: NoEffect
|
|
||||||
description: No effect of TIM_OC5REF on TIM_OCxREFC (x=1-3)
|
|
||||||
value: 0
|
|
||||||
- name: LogicalAND
|
|
||||||
description: TIM_OCxREFC is the logical AND of TIM_OCxREF and TIM_OC5REF
|
|
||||||
value: 1
|
|
||||||
enum/IBLK:
|
enum/IBLK:
|
||||||
bit_size: 2
|
bit_size: 2
|
||||||
variants:
|
variants:
|
||||||
@ -1064,21 +735,6 @@ enum/IDIR:
|
|||||||
- name: Down
|
- name: Down
|
||||||
description: Index resets the counter when down-counting only
|
description: Index resets the counter when down-counting only
|
||||||
value: 2
|
value: 2
|
||||||
enum/LOCK:
|
|
||||||
bit_size: 2
|
|
||||||
variants:
|
|
||||||
- name: Disabled
|
|
||||||
description: No bit is write protected
|
|
||||||
value: 0
|
|
||||||
- name: Level1
|
|
||||||
description: DTG bits in TIMx_BDTR register, OISx and OISxN bits in TIMx_CR2 register and BKBID/BKE/BKP/AOE bits in TIMx_BDTR register can no longer be written
|
|
||||||
value: 1
|
|
||||||
- name: Level2
|
|
||||||
description: LOCK Level 1 + CC Polarity bits (CCxP/CCxNP bits in TIMx_CCER register, as long as the related channel is configured in output through the CCxS bits) as well as OSSR and OSSI bits can no longer be written.
|
|
||||||
value: 2
|
|
||||||
- name: Level3
|
|
||||||
description: LOCK Level 2 + CC Control bits (OCxM and OCxPE bits in TIMx_CCMRx registers, as long as the related channel is configured in output through the CCxS bits) can no longer be written.
|
|
||||||
value: 3
|
|
||||||
enum/MMS:
|
enum/MMS:
|
||||||
bit_size: 3
|
bit_size: 3
|
||||||
variants:
|
variants:
|
||||||
@ -1106,57 +762,6 @@ enum/MMS:
|
|||||||
- name: CompareOC4
|
- name: CompareOC4
|
||||||
description: OC4REF signal is used as trigger output
|
description: OC4REF signal is used as trigger output
|
||||||
value: 7
|
value: 7
|
||||||
enum/MMS2:
|
|
||||||
bit_size: 4
|
|
||||||
variants:
|
|
||||||
- name: Reset
|
|
||||||
description: The UG bit from the TIMx_EGR register is used as TRGO2
|
|
||||||
value: 0
|
|
||||||
- name: Enable
|
|
||||||
description: The counter enable signal, CNT_EN, is used as TRGO2
|
|
||||||
value: 1
|
|
||||||
- name: Update
|
|
||||||
description: The update event is selected as TRGO2
|
|
||||||
value: 2
|
|
||||||
- name: ComparePulse
|
|
||||||
description: TRGO2 send a positive pulse when the CC1IF flag it to be set, as soon as a capture or a compare match occurred
|
|
||||||
value: 3
|
|
||||||
- name: CompareOC1
|
|
||||||
description: OC1REF signal is used as TRGO2
|
|
||||||
value: 4
|
|
||||||
- name: CompareOC2
|
|
||||||
description: OC2REF signal is used as TRGO2
|
|
||||||
value: 5
|
|
||||||
- name: CompareOC3
|
|
||||||
description: OC3REF signal is used as TRGO2
|
|
||||||
value: 6
|
|
||||||
- name: CompareOC4
|
|
||||||
description: OC4REF signal is used as TRGO2
|
|
||||||
value: 7
|
|
||||||
- name: CompareOC5
|
|
||||||
description: OC5REF signal is used as TRGO2
|
|
||||||
value: 8
|
|
||||||
- name: CompareOC6
|
|
||||||
description: OC6REF signal is used as TRGO2
|
|
||||||
value: 9
|
|
||||||
- name: ComparePulse_OC4
|
|
||||||
description: OC4REF rising or falling edges generate pulses on TRGO2
|
|
||||||
value: 10
|
|
||||||
- name: ComparePulse_OC6
|
|
||||||
description: OC6REF rising or falling edges generate pulses on TRGO2
|
|
||||||
value: 11
|
|
||||||
- name: ComparePulse_OC4_Or_OC6_Rising
|
|
||||||
description: OC4REF or OC6REF rising edges generate pulses on TRGO2
|
|
||||||
value: 12
|
|
||||||
- name: ComparePulse_OC4_Rising_Or_OC6_Falling
|
|
||||||
description: OC4REF rising or OC6REF falling edges generate pulses on TRGO2
|
|
||||||
value: 13
|
|
||||||
- name: ComparePulse_OC5_Or_OC6_Rising
|
|
||||||
description: OC5REF or OC6REF rising edges generate pulses on TRGO2
|
|
||||||
value: 14
|
|
||||||
- name: ComparePulse_OC5_Rising_Or_OC6_Falling
|
|
||||||
description: OC5REF rising or OC6REF falling edges generate pulses on TRGO2
|
|
||||||
value: 15
|
|
||||||
enum/MSM:
|
enum/MSM:
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
variants:
|
variants:
|
||||||
@ -1166,15 +771,6 @@ enum/MSM:
|
|||||||
- name: Sync
|
- name: Sync
|
||||||
description: The effect of an event on the trigger input (TRGI) is delayed to allow a perfect synchronization between the current timer and its slaves (through TRGO). It is useful if we want to synchronize several timers on a single external event.
|
description: The effect of an event on the trigger input (TRGI) is delayed to allow a perfect synchronization between the current timer and its slaves (through TRGO). It is useful if we want to synchronize several timers on a single external event.
|
||||||
value: 1
|
value: 1
|
||||||
enum/OCCS:
|
|
||||||
bit_size: 1
|
|
||||||
variants:
|
|
||||||
- name: Input
|
|
||||||
description: tim_ocref_clr_int is connected to the tim_ocref_clr input
|
|
||||||
value: 0
|
|
||||||
- name: ETRF
|
|
||||||
description: tim_ocref_clr_int is connected to tim_etrf
|
|
||||||
value: 1
|
|
||||||
enum/OCM:
|
enum/OCM:
|
||||||
bit_size: 3
|
bit_size: 3
|
||||||
variants:
|
variants:
|
||||||
@ -1202,24 +798,6 @@ enum/OCM:
|
|||||||
- name: PwmMode2
|
- name: PwmMode2
|
||||||
description: Inversely to PwmMode1
|
description: Inversely to PwmMode1
|
||||||
value: 7
|
value: 7
|
||||||
enum/OSSI:
|
|
||||||
bit_size: 1
|
|
||||||
variants:
|
|
||||||
- name: Disabled
|
|
||||||
description: When inactive, OC/OCN outputs are disabled
|
|
||||||
value: 0
|
|
||||||
- name: IdleLevel
|
|
||||||
description: When inactive, OC/OCN outputs are forced to idle level
|
|
||||||
value: 1
|
|
||||||
enum/OSSR:
|
|
||||||
bit_size: 1
|
|
||||||
variants:
|
|
||||||
- name: Disabled
|
|
||||||
description: When inactive, OC/OCN outputs are disabled
|
|
||||||
value: 0
|
|
||||||
- name: IdleLevel
|
|
||||||
description: When inactive, OC/OCN outputs are enabled with their inactive level
|
|
||||||
value: 1
|
|
||||||
enum/SMS:
|
enum/SMS:
|
||||||
bit_size: 3
|
bit_size: 3
|
||||||
variants:
|
variants:
|
||||||
|
|||||||
Loading…
x
Reference in New Issue
Block a user