diff --git a/data/registers/rcc_f4.yaml b/data/registers/rcc_f4.yaml
index e6e749a..91d8ce1 100644
--- a/data/registers/rcc_f4.yaml
+++ b/data/registers/rcc_f4.yaml
@@ -1565,10 +1565,6 @@ fieldset/APB1ENR:
     bit_size: 1
     description: FMPI2C1 clock enable
     name: FMPI2C1EN
-  - bit_offset: 9
-    bit_size: 1
-    description: LPTimer 1 clock enable
-    name: LPTIMER1EN
   - bit_offset: 27
     bit_size: 1
     description: CAN 3 clock enable
@@ -1696,18 +1692,6 @@ fieldset/APB1LPENR:
     bit_size: 1
     description: FMPI2C1 clock enable during Sleep
     name: FMPI2C1LPEN
-  - bit_offset: 9
-    bit_size: 1
-    description: TIM14 clock enable during Sleep mode
-    name: LPTIMER1LPEN
-  - bit_offset: 19
-    bit_size: 1
-    description: USART4 clock enable during Sleep mode
-    name: USART4LPEN
-  - bit_offset: 20
-    bit_size: 1
-    description: USART5 clock enable during Sleep mode
-    name: USART5LPEN
   - bit_offset: 27
     bit_size: 1
     description: CAN3 clock enable during Sleep mode
@@ -1802,14 +1786,14 @@ fieldset/APB1RSTR:
   - bit_offset: 18
     bit_size: 1
     description: USART 3 reset
-    name: UART3RST
+    name: USART3RST
   - bit_offset: 19
     bit_size: 1
-    description: USART 4 reset
+    description: UART 4 reset
     name: UART4RST
   - bit_offset: 20
     bit_size: 1
-    description: USART 5 reset
+    description: UART 5 reset
     name: UART5RST
   - bit_offset: 25
     bit_size: 1
@@ -1831,22 +1815,6 @@ fieldset/APB1RSTR:
     bit_size: 1
     description: FMPI2C1 reset
     name: FMPI2C1RST
-  - bit_offset: 18
-    bit_size: 1
-    description: USART3RST
-    name: USART3RST
-  - bit_offset: 9
-    bit_size: 1
-    description: LPTimer1 reset
-    name: LPTIMER1RST
-  - bit_offset: 19
-    bit_size: 1
-    description: USART4 reset
-    name: USART4RST
-  - bit_offset: 20
-    bit_size: 1
-    description: USART5 reset
-    name: USART5RST
   - bit_offset: 27
     bit_size: 1
     description: CAN 3 reset
@@ -2041,18 +2009,10 @@ fieldset/APB2LPENR:
     bit_size: 1
     description: UART9 clock enable during Sleep mode
     name: UART9LPEN
-  - bit_offset: 6
-    bit_size: 1
-    description: USART9 clock enable during Sleep mode
-    name: USART9LPEN
   - bit_offset: 7
     bit_size: 1
     description: UART10 clock enable during Sleep mode
     name: UART10LPEN
-  - bit_offset: 7
-    bit_size: 1
-    description: USART10 clock enable during Sleep mode
-    name: USART10LPEN
   - bit_offset: 22
     bit_size: 1
     description: SAI1 clock enable during Sleep mode
@@ -2140,14 +2100,6 @@ fieldset/APB2RSTR:
     bit_size: 1
     description: UART9 reset
     name: UART9RST
-  - bit_offset: 6
-    bit_size: 1
-    description: USART9 reset
-    name: USART9RST
-  - bit_offset: 7
-    bit_size: 1
-    description: USART10 reset
-    name: SART10RST
   - bit_offset: 7
     bit_size: 1
     description: UART10 reset
diff --git a/data/registers/rcc_l0.yaml b/data/registers/rcc_l0.yaml
index 11c0e42..a692aac 100644
--- a/data/registers/rcc_l0.yaml
+++ b/data/registers/rcc_l0.yaml
@@ -816,20 +816,11 @@ fieldset/APB1RSTR:
     description: I2C2 reset
     enum_write: LPTIMRSTW
     name: I2C2RST
-  - bit_offset: 27
-    bit_size: 1
-    description: CRC reset
-    enum_write: LPTIMRSTW
-    name: CRCRST
   - bit_offset: 28
     bit_size: 1
     description: Power interface reset
     enum_write: LPTIMRSTW
     name: PWRRST
-  - bit_offset: 30
-    bit_size: 1
-    description: I2C3 reset
-    name: I2C3
   - bit_offset: 31
     bit_size: 1
     description: Low power timer reset
@@ -840,16 +831,6 @@ fieldset/APB1RSTR:
     description: I2C3 reset
     enum_write: LPTIMRSTW
     name: I2C3RST
-  - bit_offset: 11
-    bit_size: 1
-    description: Window watchdog reset
-    enum_write: LPTIMRSTW
-    name: WWDRST
-  - bit_offset: 17
-    bit_size: 1
-    description: UART2 reset
-    enum_write: LPTIMRSTW
-    name: LPUART12RST
   - bit_offset: 23
     bit_size: 1
     description: USB reset
diff --git a/data/registers/rcc_l4.yaml b/data/registers/rcc_l4.yaml
index 9e498ea..f469afd 100644
--- a/data/registers/rcc_l4.yaml
+++ b/data/registers/rcc_l4.yaml
@@ -338,10 +338,6 @@ fieldset/AHB2ENR:
     bit_size: 1
     description: HASH clock enable
     name: HASHEN
-  - bit_offset: 17
-    bit_size: 1
-    description: HASH clock enable
-    name: HASH1EN
   - bit_offset: 18
     bit_size: 1
     description: Random Number Generator clock enable
@@ -413,10 +409,6 @@ fieldset/AHB2RSTR:
     bit_size: 1
     description: Hash reset
     name: HASHRST
-  - bit_offset: 17
-    bit_size: 1
-    description: Hash reset
-    name: HASH1RST
   - bit_offset: 18
     bit_size: 1
     description: Random number generator reset
@@ -600,14 +592,10 @@ fieldset/APB1ENR1:
     bit_size: 1
     description: SPI2 clock enable
     name: SPI2EN
-  - bit_offset: 15
-    bit_size: 1
-    description: SPI peripheral 3 clock enable
-    name: SPI3EN
   - bit_offset: 15
     bit_size: 1
     description: SPI3 clock enable
-    name: SP3EN
+    name: SPI3EN
   - bit_offset: 17
     bit_size: 1
     description: USART2 clock enable
@@ -644,10 +632,6 @@ fieldset/APB1ENR1:
     bit_size: 1
     description: CAN1 clock enable
     name: CAN1EN
-  - bit_offset: 26
-    bit_size: 1
-    description: USB FS clock enable
-    name: USBF
   - bit_offset: 26
     bit_size: 1
     description: USB FS clock enable
@@ -746,10 +730,6 @@ fieldset/APB1RSTR1:
     bit_size: 1
     description: UART4 reset
     name: UART4RST
-  - bit_offset: 19
-    bit_size: 1
-    description: USART4 reset.
-    name: USART4RST
   - bit_offset: 20
     bit_size: 1
     description: UART5 reset
@@ -876,10 +856,6 @@ fieldset/APB1SMENR1:
     bit_size: 1
     description: UART4 clocks enable during Sleep and Stop modes
     name: UART4SMEN
-  - bit_offset: 19
-    bit_size: 1
-    description: USART4 clocks enable during Sleep and Stop modes
-    name: USART4SMEN
   - bit_offset: 20
     bit_size: 1
     description: UART5 clocks enable during Sleep and Stop modes
@@ -1210,10 +1186,6 @@ fieldset/CCIPR:
     bit_size: 2
     description: UART4 clock source selection
     name: UART4SEL
-  - bit_offset: 6
-    bit_size: 2
-    description: USART4 clock source selection
-    name: USART4SEL
   - bit_offset: 8
     bit_size: 2
     description: UART5 clock source selection