commit
e19240e3d3
2
d.ps1
2
d.ps1
@ -28,7 +28,7 @@ Switch ($CMD)
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echo "processing $f ..."
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chiptool extract-peripheral --svd "sources/svd/stm32$f.svd" --peripheral "$peri" > "tmp/$peri/$f.yaml" 2> "tmp/$peri/$f.err"
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if (!$error) {
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if ($LASTEXITCODE -eq 0) {
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rm "tmp/$peri/$f.err"
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echo OK
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} else {
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179
data/registers/fmac_v1.yaml
Normal file
179
data/registers/fmac_v1.yaml
Normal file
@ -0,0 +1,179 @@
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---
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block/FMAC:
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description: Filter math accelerator
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items:
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- name: X1BUFCFG
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description: X1 buffer configuration register
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byte_offset: 0
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fieldset: X1BUFCFG
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- name: X2BUFCFG
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description: X2 buffer configuration register
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byte_offset: 4
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fieldset: X2BUFCFG
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- name: YBUFCFG
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description: Y buffer configuration register
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byte_offset: 8
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fieldset: YBUFCFG
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- name: PARAM
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description: Parameter register
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byte_offset: 12
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fieldset: PARAM
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- name: CR
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description: Control register
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byte_offset: 16
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fieldset: CR
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- name: SR
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description: Status register
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byte_offset: 20
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access: Read
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fieldset: SR
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- name: WDATA
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description: Write data register
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byte_offset: 24
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access: Write
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fieldset: WDATA
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- name: RDATA
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description: Read data register
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byte_offset: 28
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access: Read
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fieldset: RDATA
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fieldset/CR:
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description: Control register
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fields:
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- name: RIEN
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description: Enable read interrupt
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bit_offset: 0
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bit_size: 1
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- name: WIEN
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description: Enable write interrupt
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bit_offset: 1
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bit_size: 1
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- name: OVFLIEN
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description: Enable overflow error interrupts
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bit_offset: 2
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bit_size: 1
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- name: UNFLIEN
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description: Enable underflow error interrupts
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bit_offset: 3
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bit_size: 1
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- name: SATIEN
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description: Enable saturation error interrupts
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bit_offset: 4
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bit_size: 1
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- name: DMAREN
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description: Enable DMA read channel requests
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bit_offset: 8
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bit_size: 1
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- name: DMAWEN
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description: Enable DMA write channel requests
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bit_offset: 9
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bit_size: 1
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- name: CLIPEN
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description: Enable clipping
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bit_offset: 15
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bit_size: 1
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- name: RESET
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description: Reset FMAC unit
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bit_offset: 16
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bit_size: 1
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fieldset/PARAM:
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description: Parameter register
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fields:
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- name: P
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description: Input parameter P
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bit_offset: 0
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bit_size: 8
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- name: Q
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description: Input parameter Q
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bit_offset: 8
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bit_size: 8
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- name: R
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description: Input parameter R
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bit_offset: 16
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bit_size: 8
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- name: FUNC
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description: Function
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bit_offset: 24
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bit_size: 7
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- name: START
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description: Enable execution
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bit_offset: 31
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bit_size: 1
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fieldset/RDATA:
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description: Read data register
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fields:
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- name: RES
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description: Read data (contents of the Y output buffer at the address indicated by the READ pointer)
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bit_offset: 0
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bit_size: 16
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fieldset/SR:
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description: Status register
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fields:
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- name: YEMPTY
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description: Y buffer empty flag
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bit_offset: 0
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bit_size: 1
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- name: X1FULL
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description: X1 buffer full flag
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bit_offset: 1
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bit_size: 1
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- name: OVFL
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description: Overflow error flag
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bit_offset: 8
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bit_size: 1
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- name: UNFL
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description: Underflow error flag
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bit_offset: 9
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bit_size: 1
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- name: SAT
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description: Saturation error flag
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bit_offset: 10
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bit_size: 1
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fieldset/WDATA:
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description: Write data register
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fields:
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- name: WDATA
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description: Write data (write data are transferred to the address indicated by the write pointer)
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bit_offset: 0
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bit_size: 16
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fieldset/X1BUFCFG:
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description: X1 buffer configuration register
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fields:
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- name: X1_BASE
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description: Base address of X1 buffer
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bit_offset: 0
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bit_size: 8
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- name: X1_BUF_SIZE
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description: Allocated size of X1 buffer in 16-bit words
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bit_offset: 8
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bit_size: 8
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- name: FULL_WM
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description: Watermark for buffer full flag
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bit_offset: 24
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bit_size: 2
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fieldset/X2BUFCFG:
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description: X2 buffer configuration register
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fields:
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- name: X2_BASE
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description: Base address of X2 buffer
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bit_offset: 0
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bit_size: 8
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- name: X2_BUF_SIZE
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description: Size of X2 buffer in 16-bit words
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bit_offset: 8
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bit_size: 8
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fieldset/YBUFCFG:
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description: Y buffer configuration register
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fields:
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- name: Y_BASE
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description: Base address of Y buffer
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bit_offset: 0
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bit_size: 8
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- name: Y_BUF_SIZE
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description: Size of Y buffer in 16-bit words
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bit_offset: 8
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bit_size: 8
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- name: EMPTY_WM
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description: Watermark for buffer empty flag
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bit_offset: 24
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bit_size: 2
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@ -149,6 +149,7 @@ impl PeriMatcher {
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(".*:SPI:spi2s2_v1_0", ("spi", "v3", "SPI")),
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(".*:SPI:spi2s3_v2_1", ("spi", "v4", "SPI")),
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(".*:SPI:spi2s3_v1_1", ("spi", "v5", "SPI")),
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(".*:FMAC:matrix1_v1_0", ("fmac", "v1", "FMAC")),
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(".*:I2C:i2c1_v1_5", ("i2c", "v1", "I2C")),
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(".*:I2C:i2c2_v1_1", ("i2c", "v2", "I2C")),
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(".*:I2C:F0-i2c2_v1_1", ("i2c", "v2", "I2C")),
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