From dff9c321f38b80504cfefdc17165794e8d802982 Mon Sep 17 00:00:00 2001 From: Don Reilly Date: Mon, 7 Aug 2023 15:04:18 -0500 Subject: [PATCH] readd DBGMCU back into F3 and F3v2 --- data/registers/rcc_f3.yaml | 8 ++++++++ data/registers/rcc_f3_v2.yaml | 4 ++++ 2 files changed, 12 insertions(+) diff --git a/data/registers/rcc_f3.yaml b/data/registers/rcc_f3.yaml index 583f36b..3516fef 100644 --- a/data/registers/rcc_f3.yaml +++ b/data/registers/rcc_f3.yaml @@ -389,6 +389,10 @@ fieldset/APB2ENR: description: TIM20 timer clock enable bit_offset: 20 bit_size: 1 + - name: DBGMCUEN + description: MCU debug module clock enable + bit_offset: 22 + bit_size: 1 - name: HRTIM1EN description: High Resolution Timer 1 clock enable bit_offset: 29 @@ -440,6 +444,10 @@ fieldset/APB2RSTR: description: TIM20 timer reset bit_offset: 20 bit_size: 1 + - name: DBGMCURST + description: Debug MCU reset + bit_offset: 22 + bit_size: 1 - name: HRTIM1RST description: High Resolution Timer1 reset bit_offset: 29 diff --git a/data/registers/rcc_f3_v2.yaml b/data/registers/rcc_f3_v2.yaml index 87926df..7e4dfab 100644 --- a/data/registers/rcc_f3_v2.yaml +++ b/data/registers/rcc_f3_v2.yaml @@ -412,6 +412,10 @@ fieldset/APB2RSTR: description: TIM19 timer reset bit_offset: 19 bit_size: 1 + - name: DBGMCURST + description: MCU debug module clock enable + bit_offset: 22 + bit_size: 1 - name: SDADC1RST description: SDADC1 (Sigma delta ADC 1) reset bit_offset: 24