apply transform
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@ -1,23 +1,23 @@
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block/COMP:
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block/COMP:
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description: Comparator.
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description: Comparator.
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items:
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items:
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- name: COMP_SR
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- name: SR
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description: Comparator status register.
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description: Comparator status register.
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byte_offset: 0
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byte_offset: 0
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fieldset: COMP_SR
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fieldset: SR
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- name: COMP_ICFR
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- name: ICFR
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description: Comparator interrupt clear flag register.
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description: Comparator interrupt clear flag register.
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byte_offset: 4
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byte_offset: 4
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fieldset: COMP_ICFR
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fieldset: ICFR
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- name: COMP_CFGR1
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- name: CFGR1
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description: Comparator configuration register 1.
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description: Comparator configuration register 1.
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byte_offset: 12
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byte_offset: 12
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fieldset: COMP_CFGR1
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fieldset: CFGR1
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- name: COMP_CFGR2
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- name: CFGR2
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description: Comparator configuration register 2.
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description: Comparator configuration register 2.
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byte_offset: 16
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byte_offset: 16
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fieldset: COMP_CFGR2
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fieldset: CFGR2
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fieldset/COMP_CFGR1:
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fieldset/CFGR1:
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description: Comparator configuration register 1.
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description: Comparator configuration register 1.
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fields:
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fields:
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- name: EN
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- name: EN
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@ -68,7 +68,7 @@ fieldset/COMP_CFGR1:
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description: Lock This bit is set by software and cleared by a hardware system reset. It locks the whole content of the COMP Channel1 configuration register COMP_CFGR1[31:0].
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description: Lock This bit is set by software and cleared by a hardware system reset. It locks the whole content of the COMP Channel1 configuration register COMP_CFGR1[31:0].
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bit_offset: 31
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bit_offset: 31
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bit_size: 1
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bit_size: 1
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fieldset/COMP_CFGR2:
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fieldset/CFGR2:
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description: Comparator configuration register 2.
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description: Comparator configuration register 2.
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fields:
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fields:
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- name: INPSEL0
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- name: INPSEL0
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@ -79,21 +79,30 @@ fieldset/COMP_CFGR2:
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description: Lock This bit is set by software and cleared by a hardware system reset. It locks the whole content of the COMP Channel1 configuration register COMP_CFGR2[31:0].
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description: Lock This bit is set by software and cleared by a hardware system reset. It locks the whole content of the COMP Channel1 configuration register COMP_CFGR2[31:0].
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bit_offset: 31
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bit_offset: 31
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bit_size: 1
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bit_size: 1
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fieldset/COMP_ICFR:
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fieldset/ICFR:
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description: Comparator interrupt clear flag register.
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description: Comparator interrupt clear flag register.
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fields:
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fields:
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- name: CC1IF
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- name: CCIF
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description: Clear COMP Channel1 interrupt flag Writing 1 clears the C1IF flag in the COMP_SR register.
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description: Clear COMP Channel1 interrupt flag Writing 1 clears the C1IF flag in the COMP_SR register.
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bit_offset: 16
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bit_offset: 16
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bit_size: 1
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bit_size: 1
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fieldset/COMP_SR:
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array:
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len: 1
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stride: 0
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fieldset/SR:
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description: Comparator status register.
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description: Comparator status register.
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fields:
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fields:
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- name: C1VAL
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- name: CIF
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description: COMP Channel1 output status bit This bit is read-only. It reflects the current COMP Channel1 output taking into account POLARITY and BLANKING bits effect.
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bit_offset: 0
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bit_size: 1
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- name: C1IF
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description: COMP Channel1 interrupt flag This bit is set by hardware when the COMP Channel1 output is set This bit is cleared by software writing 1 the CC1IF bit in the COMP_ICFR register.
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description: COMP Channel1 interrupt flag This bit is set by hardware when the COMP Channel1 output is set This bit is cleared by software writing 1 the CC1IF bit in the COMP_ICFR register.
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bit_offset: 16
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bit_offset: 16
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bit_size: 1
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bit_size: 1
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array:
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len: 1
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stride: 0
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- name: CVAL
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description: COMP Channel1 output status bit This bit is read-only. It reflects the current COMP Channel1 output taking into account POLARITY and BLANKING bits effect.
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bit_offset: 0
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bit_size: 1
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array:
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len: 1
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stride: 0
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@ -4,6 +4,15 @@ transforms:
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from: ^(COMP)\d$
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from: ^(COMP)\d$
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to: $1
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to: $1
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- !RenameRegisters
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block: COMP
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from: ^COMP_(.+)$
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to: $1
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- !Rename
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from: ^COMP_(.+)$
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to: $1
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- !MakeFieldArray
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- !MakeFieldArray
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fieldsets: ^(SR|ICFR)$
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fieldsets: ^(SR|ICFR)$
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from: (C?C)\d(IF|VAL)
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from: (C?C)\d(IF|VAL)
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