diff --git a/data/registers/timer_v1.yaml b/data/registers/timer_v1.yaml index 159ef3c..004a76a 100644 --- a/data/registers/timer_v1.yaml +++ b/data/registers/timer_v1.yaml @@ -159,7 +159,7 @@ block/TIM_2CH: byte_offset: 104 fieldset: TISEL_2CH block/TIM_2CH_CMP: - extends: TIM_2CH + extends: TIM_1CH_CMP description: 2-channel with one complementary output timers items: - name: CR2 @@ -177,20 +177,37 @@ block/TIM_2CH_CMP: - name: SR description: status register byte_offset: 16 - fieldset: SR_1CH_CMP + fieldset: SR_2CH_CMP - name: EGR description: event generation register byte_offset: 20 access: Write - fieldset: EGR_1CH_CMP + fieldset: EGR_2CH_CMP + - name: CCMR_Input + description: capture/compare mode register 1 (input mode) + array: + len: 2 + stride: 4 + byte_offset: 24 + fieldset: CCMR_Input_1CH + - name: CCMR_Output + description: capture/compare mode register 1 (output mode) + array: + len: 2 + stride: 4 + byte_offset: 24 + fieldset: CCMR_Output_1CH - name: CCER description: capture/compare enable register byte_offset: 32 fieldset: CCER_2CH_CMP - - name: RCR - description: repetition counter register - byte_offset: 48 - fieldset: RCR_1CH_CMP + - name: CCR + description: capture/compare register x (x=1-2) + array: + len: 2 + stride: 4 + byte_offset: 52 + fieldset: CCR_GP16 - name: BDTR description: break and dead-time register byte_offset: 68 @@ -203,10 +220,6 @@ block/TIM_2CH_CMP: description: DMA address for full transfer byte_offset: 76 fieldset: DMAR_GP16 - - name: AF1 - description: alternate function register 1 - byte_offset: 96 - fieldset: AF1_1CH_CMP - name: TISEL description: input selection register byte_offset: 104 @@ -1148,22 +1161,19 @@ fieldset/CR2_2CH: bit_size: 1 enum: TI1S fieldset/CR2_2CH_CMP: - extends: CR2_2CH + extends: CR2_1CH_CMP description: control register 2 fields: - - name: CCPC - description: Capture/compare preloaded control - bit_offset: 0 + - name: MMS + description: Master mode selection + bit_offset: 4 + bit_size: 3 + enum: MMS + - name: TI1S + description: TI1 selection + bit_offset: 7 bit_size: 1 - - name: CCUS - description: Capture/compare control update selection - bit_offset: 2 - bit_size: 1 - - name: CCDS - description: Capture/compare DMA selection - bit_offset: 3 - bit_size: 1 - enum: CCDS + enum: TI1S - name: OIS description: Output Idle state x (x=1,2) bit_offset: 8 @@ -1171,13 +1181,6 @@ fieldset/CR2_2CH_CMP: array: len: 2 stride: 2 - - name: OISN - description: Output Idle state x (x=1) - bit_offset: 9 - bit_size: 1 - array: - len: 1 - stride: 2 fieldset/CR2_ADV: extends: CR2_GP16 description: control register 2 @@ -1464,6 +1467,21 @@ fieldset/EGR_2CH: description: Trigger generation bit_offset: 6 bit_size: 1 +fieldset/EGR_2CH_CMP: + extends: EGR_1CH_CMP + description: event generation register + fields: + - name: CCG + description: Capture/compare x (x=1,2) generation + bit_offset: 1 + bit_size: 1 + array: + len: 2 + stride: 1 + - name: TG + description: Trigger generation + bit_offset: 6 + bit_size: 1 fieldset/EGR_ADV: extends: EGR_GP16 description: event generation register @@ -1644,6 +1662,28 @@ fieldset/SR_2CH: array: len: 2 stride: 1 +fieldset/SR_2CH_CMP: + extends: SR_1CH_CMP + description: status register + fields: + - name: CCIF + description: Capture/compare x (x=1,2) interrupt flag + bit_offset: 1 + bit_size: 1 + array: + len: 2 + stride: 1 + - name: TIF + description: Trigger interrupt flag + bit_offset: 6 + bit_size: 1 + - name: CCOF + description: Capture/Compare x (x=1,2) overcapture flag + bit_offset: 9 + bit_size: 1 + array: + len: 2 + stride: 1 fieldset/SR_ADV: extends: SR_GP16 description: status register diff --git a/data/registers/timer_v2.yaml b/data/registers/timer_v2.yaml index 6f1eac8..6b3f311 100644 --- a/data/registers/timer_v2.yaml +++ b/data/registers/timer_v2.yaml @@ -185,7 +185,7 @@ block/TIM_2CH: byte_offset: 92 fieldset: TISEL_2CH block/TIM_2CH_CMP: - extends: TIM_2CH + extends: TIM_1CH_CMP description: 2-channel with one complementary output timers items: - name: CR2 @@ -203,48 +203,45 @@ block/TIM_2CH_CMP: - name: SR description: status register byte_offset: 16 - fieldset: SR_1CH_CMP + fieldset: SR_2CH_CMP - name: EGR description: event generation register byte_offset: 20 access: Write - fieldset: EGR_1CH_CMP + fieldset: EGR_2CH_CMP + - name: CCMR_Input + description: capture/compare mode register 1 (input mode) + array: + len: 2 + stride: 4 + byte_offset: 24 + fieldset: CCMR_Input_1CH + - name: CCMR_Output + description: capture/compare mode register 1 (output mode) + array: + len: 2 + stride: 4 + byte_offset: 24 + fieldset: CCMR_Output_1CH - name: CCER description: capture/compare enable register byte_offset: 32 fieldset: CCER_2CH_CMP - - name: RCR - description: repetition counter register - byte_offset: 48 - fieldset: RCR_1CH_CMP + - name: CCR + description: capture/compare register x (x=1-2) + array: + len: 2 + stride: 4 + byte_offset: 52 + fieldset: CCR_GP16 - name: BDTR description: break and dead-time register byte_offset: 68 fieldset: BDTR_1CH_CMP - - name: DTR2 - description: break and dead-time register - byte_offset: 84 - fieldset: DTR2_ADV - name: TISEL description: input selection register byte_offset: 92 fieldset: TISEL_2CH - - name: AF1 - description: alternate function register 1 - byte_offset: 96 - fieldset: AF1_1CH_CMP - - name: AF2 - description: alternate function register 2 - byte_offset: 100 - fieldset: AF2_GP16 - - name: DCR - description: DMA control register - byte_offset: 988 - fieldset: DCR_GP16 - - name: DMAR - description: DMA address for full transfer - byte_offset: 992 - fieldset: DMAR_GP16 block/TIM_ADV: extends: TIM_GP16 description: Advanced Control timers @@ -1303,22 +1300,19 @@ fieldset/CR2_2CH: bit_size: 1 enum: TI1S fieldset/CR2_2CH_CMP: - extends: CR2_2CH + extends: CR2_1CH_CMP description: control register 2 fields: - - name: CCPC - description: Capture/compare preloaded control - bit_offset: 0 + - name: MMS + description: Master mode selection + bit_offset: 4 + bit_size: 3 + enum: MMS + - name: TI1S + description: TI1 selection + bit_offset: 7 bit_size: 1 - - name: CCUS - description: Capture/compare control update selection - bit_offset: 2 - bit_size: 1 - - name: CCDS - description: Capture/compare DMA selection - bit_offset: 3 - bit_size: 1 - enum: CCDS + enum: TI1S - name: OIS description: Output Idle state x (x=1,2) bit_offset: 8 @@ -1326,13 +1320,6 @@ fieldset/CR2_2CH_CMP: array: len: 2 stride: 2 - - name: OISN - description: Output Idle state x (x=1) - bit_offset: 9 - bit_size: 1 - array: - len: 1 - stride: 2 fieldset/CR2_ADV: extends: CR2_GP16 description: control register 2 @@ -1640,6 +1627,21 @@ fieldset/EGR_2CH: description: Trigger generation bit_offset: 6 bit_size: 1 +fieldset/EGR_2CH_CMP: + extends: EGR_1CH_CMP + description: event generation register + fields: + - name: CCG + description: Capture/compare x (x=1,2) generation + bit_offset: 1 + bit_size: 1 + array: + len: 2 + stride: 1 + - name: TG + description: Trigger generation + bit_offset: 6 + bit_size: 1 fieldset/EGR_ADV: extends: EGR_GP16 description: event generation register @@ -1837,6 +1839,28 @@ fieldset/SR_2CH: array: len: 2 stride: 1 +fieldset/SR_2CH_CMP: + extends: SR_1CH_CMP + description: status register + fields: + - name: CCIF + description: Capture/compare x (x=1,2) interrupt flag + bit_offset: 1 + bit_size: 1 + array: + len: 2 + stride: 1 + - name: TIF + description: Trigger interrupt flag + bit_offset: 6 + bit_size: 1 + - name: CCOF + description: Capture/Compare x (x=1,2) overcapture flag + bit_offset: 9 + bit_size: 1 + array: + len: 2 + stride: 1 fieldset/SR_ADV: extends: SR_GP16 description: status register