From d8592bdd8c2435889b0529c787b2720b2930ffe2 Mon Sep 17 00:00:00 2001
From: "Cliff L. Biffle" <code@cliffle.com>
Date: Wed, 28 Jun 2023 11:06:26 -0700
Subject: [PATCH] gpio_v2: expand docs on AFRx register pair to describe
 indexing.

---
 data/registers/gpio_v2.yaml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/data/registers/gpio_v2.yaml b/data/registers/gpio_v2.yaml
index 4b91560..136d1c0 100644
--- a/data/registers/gpio_v2.yaml
+++ b/data/registers/gpio_v2.yaml
@@ -37,7 +37,7 @@ block/GPIO:
       byte_offset: 28
       fieldset: LCKR
     - name: AFR
-      description: "GPIO alternate function register (low, high)"
+      description: "GPIO alternate function registers. The register described in the datasheet as AFRL is index 0 in this array, and AFRH is index 1. Note that when operating on AFRH, you need to subtract 8 from any operations on the field array it contains -- the alternate function for pin 9 is at index 1, for instance."
       array:
         len: 2
         stride: 4