Added cryp registers. Removed fieldsets for single 32-bit fields.
This commit is contained in:
Caleb Garrett
parent
663899be65
commit
d7a1c8e231
165
data/registers/cryp_v1.yaml
Normal file
165
data/registers/cryp_v1.yaml
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@ -0,0 +1,165 @@
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block/CRYP:
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description: Cryptographic processor.
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items:
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- name: CR
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description: control register.
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byte_offset: 0
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fieldset: CR
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- name: SR
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description: status register.
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byte_offset: 4
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access: Read
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fieldset: SR
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- name: DIN
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description: data input register.
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byte_offset: 8
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- name: DOUT
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description: data output register.
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byte_offset: 12
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access: Read
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- name: DMACR
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description: DMA control register.
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byte_offset: 16
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fieldset: DMACR
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- name: IMSCR
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description: interrupt mask set/clear register.
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byte_offset: 20
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fieldset: IMSCR
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- name: RISR
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description: raw interrupt status register.
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byte_offset: 24
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access: Read
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fieldset: RISR
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- name: MISR
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description: masked interrupt status register.
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byte_offset: 28
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access: Read
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fieldset: MISR
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- name: KEY
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description: Cluster KEY%s, containing K?LR, K?RR.
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array:
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len: 4
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stride: 8
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byte_offset: 32
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block: KEY
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- name: INIT
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description: Cluster INIT%s, containing IV?LR, IV?RR.
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array:
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len: 2
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stride: 8
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byte_offset: 64
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block: INIT
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block/INIT:
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description: Cluster INIT%s, containing IV?LR, IV?RR.
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items:
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- name: IVLR
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description: initialization vector registers.
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byte_offset: 0
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- name: IVRR
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description: initialization vector registers.
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byte_offset: 4
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block/KEY:
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description: Cluster KEY%s, containing K?LR, K?RR.
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items:
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- name: KLR
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description: key registers.
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byte_offset: 0
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access: Write
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- name: KRR
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description: key registers.
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byte_offset: 4
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access: Write
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fieldset/CR:
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description: control register.
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fields:
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- name: ALGODIR
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description: Algorithm direction.
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bit_offset: 2
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bit_size: 1
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- name: ALGOMODE
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description: Algorithm mode.
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bit_offset: 3
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bit_size: 3
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- name: DATATYPE
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description: Data type selection.
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bit_offset: 6
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bit_size: 2
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- name: KEYSIZE
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description: Key size selection (AES mode only).
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bit_offset: 8
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bit_size: 2
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- name: FFLUSH
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description: FIFO flush.
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bit_offset: 14
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bit_size: 1
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- name: CRYPEN
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description: Cryptographic processor enable.
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bit_offset: 15
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bit_size: 1
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fieldset/DMACR:
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description: DMA control register.
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fields:
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- name: DIEN
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description: DMA input enable.
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bit_offset: 0
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bit_size: 1
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- name: DOEN
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description: DMA output enable.
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bit_offset: 1
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bit_size: 1
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fieldset/IMSCR:
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description: interrupt mask set/clear register.
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fields:
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- name: INIM
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description: Input FIFO service interrupt mask.
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bit_offset: 0
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bit_size: 1
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- name: OUTIM
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description: Output FIFO service interrupt mask.
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bit_offset: 1
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bit_size: 1
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fieldset/MISR:
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description: masked interrupt status register.
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fields:
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- name: INMIS
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description: Input FIFO service masked interrupt status.
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bit_offset: 0
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bit_size: 1
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- name: OUTMIS
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description: Output FIFO service masked interrupt status.
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bit_offset: 1
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bit_size: 1
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fieldset/RISR:
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description: raw interrupt status register.
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fields:
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- name: INRIS
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description: Input FIFO service raw interrupt status.
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bit_offset: 0
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bit_size: 1
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- name: OUTRIS
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description: Output FIFO service raw interrupt status.
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bit_offset: 1
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bit_size: 1
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fieldset/SR:
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description: status register.
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fields:
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- name: IFEM
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description: Input FIFO empty.
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bit_offset: 0
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bit_size: 1
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- name: IFNF
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description: Input FIFO not full.
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bit_offset: 1
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bit_size: 1
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- name: OFNE
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description: Output FIFO not empty.
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bit_offset: 2
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bit_size: 1
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- name: OFFU
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description: Output FIFO full.
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bit_offset: 3
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bit_size: 1
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- name: BUSY
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description: Busy bit.
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bit_offset: 4
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bit_size: 1
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185
data/registers/cryp_v2.yaml
Normal file
185
data/registers/cryp_v2.yaml
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@ -0,0 +1,185 @@
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block/CRYP:
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description: Cryptographic processor.
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items:
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- name: CR
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description: control register.
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byte_offset: 0
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fieldset: CR
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- name: SR
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description: status register.
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byte_offset: 4
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access: Read
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fieldset: SR
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- name: DIN
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description: data input register.
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byte_offset: 8
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- name: DOUT
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description: data output register.
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byte_offset: 12
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access: Read
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- name: DMACR
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description: DMA control register.
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byte_offset: 16
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fieldset: DMACR
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- name: IMSCR
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description: interrupt mask set/clear register.
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byte_offset: 20
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fieldset: IMSCR
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- name: RISR
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description: raw interrupt status register.
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byte_offset: 24
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access: Read
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fieldset: RISR
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- name: MISR
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description: masked interrupt status register.
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byte_offset: 28
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access: Read
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fieldset: MISR
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- name: KEY
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description: Cluster KEY%s, containing K?LR, K?RR.
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array:
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len: 4
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stride: 8
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byte_offset: 32
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block: KEY
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- name: INIT
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description: Cluster INIT%s, containing IV?LR, IV?RR.
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array:
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len: 2
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stride: 8
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byte_offset: 64
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block: INIT
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- name: CSGCMCCMR
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description: context swap register.
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array:
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len: 8
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stride: 4
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byte_offset: 80
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- name: CSGCMR
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description: context swap register.
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array:
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len: 8
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stride: 4
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byte_offset: 112
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block/INIT:
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description: Cluster INIT%s, containing IV?LR, IV?RR.
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items:
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- name: IVLR
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description: initialization vector registers.
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byte_offset: 0
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- name: IVRR
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description: initialization vector registers.
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byte_offset: 4
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block/KEY:
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description: Cluster KEY%s, containing K?LR, K?RR.
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items:
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- name: KLR
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description: key registers.
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byte_offset: 0
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access: Write
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- name: KRR
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description: key registers.
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byte_offset: 4
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access: Write
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fieldset/CR:
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description: control register.
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fields:
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- name: ALGODIR
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description: Algorithm direction.
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bit_offset: 2
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bit_size: 1
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- name: ALGOMODE0
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description: Algorithm mode.
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bit_offset: 3
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bit_size: 3
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- name: DATATYPE
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description: Data type selection.
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bit_offset: 6
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bit_size: 2
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- name: KEYSIZE
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description: Key size selection (AES mode only).
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bit_offset: 8
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bit_size: 2
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- name: FFLUSH
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description: FIFO flush.
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bit_offset: 14
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bit_size: 1
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- name: CRYPEN
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description: Cryptographic processor enable.
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bit_offset: 15
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bit_size: 1
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- name: GCM_CCMPH
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description: GCM_CCMPH.
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bit_offset: 16
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bit_size: 2
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- name: ALGOMODE3
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description: ALGOMODE.
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bit_offset: 19
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bit_size: 1
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fieldset/DMACR:
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description: DMA control register.
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fields:
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- name: DIEN
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description: DMA input enable.
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bit_offset: 0
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bit_size: 1
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- name: DOEN
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description: DMA output enable.
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bit_offset: 1
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bit_size: 1
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fieldset/IMSCR:
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description: interrupt mask set/clear register.
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fields:
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- name: INIM
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description: Input FIFO service interrupt mask.
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bit_offset: 0
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bit_size: 1
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- name: OUTIM
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description: Output FIFO service interrupt mask.
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bit_offset: 1
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bit_size: 1
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fieldset/MISR:
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description: masked interrupt status register.
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fields:
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- name: INMIS
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description: Input FIFO service masked interrupt status.
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bit_offset: 0
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bit_size: 1
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- name: OUTMIS
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description: Output FIFO service masked interrupt status.
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bit_offset: 1
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bit_size: 1
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fieldset/RISR:
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description: raw interrupt status register.
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fields:
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- name: INRIS
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description: Input FIFO service raw interrupt status.
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bit_offset: 0
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bit_size: 1
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- name: OUTRIS
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description: Output FIFO service raw interrupt status.
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bit_offset: 1
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bit_size: 1
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fieldset/SR:
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description: status register.
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fields:
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- name: IFEM
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description: Input FIFO empty.
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bit_offset: 0
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bit_size: 1
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- name: IFNF
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description: Input FIFO not full.
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bit_offset: 1
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bit_size: 1
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- name: OFNE
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description: Output FIFO not empty.
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bit_offset: 2
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bit_size: 1
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- name: OFFU
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description: Output FIFO full.
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bit_offset: 3
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bit_size: 1
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- name: BUSY
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description: Busy bit.
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bit_offset: 4
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bit_size: 1
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