Merge pull request #326 from chrenderle/dbgmcu_l5

dbgmcu: add support for stm32l5

data/registers/dbgmcu_l5.yaml

@@ -0,0 +1,151 @@
+block/DBGMCU:
+  description: MCU debug component
+  items:
+  - name: IDCODE
+    description: DBGMCU_IDCODE
+    byte_offset: 0
+    access: Read
+    fieldset: IDCODE
+  - name: CR
+    description: Debug MCU configuration register
+    byte_offset: 4
+    fieldset: CR
+  - name: APB1FZR1
+    description: Debug MCU APB1 freeze register1
+    byte_offset: 8
+    fieldset: APB1FZR1
+  - name: APB1FZR2
+    description: Debug MCU APB1 freeze register 2
+    byte_offset: 12
+    fieldset: APB1FZR2
+  - name: APB2FZR
+    description: Debug MCU APB2 freeze register
+    byte_offset: 16
+    fieldset: APB2FZR
+fieldset/APB1FZR1:
+  description: Debug MCU APB1 freeze register1
+  fields:
+  - name: TIM2
+    description: TIM2 counter stopped when core is halted
+    bit_offset: 0
+    bit_size: 1
+  - name: TIM3
+    description: TIM3 counter stopped when core is halted
+    bit_offset: 1
+    bit_size: 1
+  - name: TIM4
+    description: TIM4 counter stopped when core is halted
+    bit_offset: 2
+    bit_size: 1
+  - name: TIM5
+    description: TIM5 counter stopped when core is halted
+    bit_offset: 3
+    bit_size: 1
+  - name: TIM6
+    description: TIM6 counter stopped when core is halted
+    bit_offset: 4
+    bit_size: 1
+  - name: TIM7
+    description: TIM7 counter stopped when core is halted
+    bit_offset: 5
+    bit_size: 1
+  - name: RTC
+    description: RTC counter stopped when core is halted
+    bit_offset: 10
+    bit_size: 1
+  - name: WWDG
+    description: Window watchdog counter stopped when core is halted
+    bit_offset: 11
+    bit_size: 1
+  - name: IWDG
+    description: Independent watchdog counter stopped when core is halted
+    bit_offset: 12
+    bit_size: 1
+  - name: I2C1
+    description: I2C1 SMBUS timeout counter stopped when core is halted
+    bit_offset: 21
+    bit_size: 1
+  - name: I2C2
+    description: I2C2 SMBUS timeout counter stopped when core is halted
+    bit_offset: 22
+    bit_size: 1
+  - name: I2C3
+    description: I2C3 SMBUS timeout counter stopped when core is halted
+    bit_offset: 23
+    bit_size: 1
+  - name: LPTIM1
+    description: LPTIM1 counter stopped when core is halted
+    bit_offset: 31
+    bit_size: 1
+fieldset/APB1FZR2:
+  description: Debug MCU APB1 freeze register 2
+  fields:
+  - name: I2C4
+    description: I2C4 counter stopped when core is halted
+    bit_offset: 1
+    bit_size: 1
+  - name: LPTIM2
+    description: LPTIM2 counter stopped when core is halted
+    bit_offset: 5
+    bit_size: 1
+  - name: LPTIM3
+    description: LPTIM3 counter stopped when core is halted
+    bit_offset: 6
+    bit_size: 1
+fieldset/APB2FZR:
+  description: Debug MCU APB2 freeze register
+  fields:
+  - name: TIM1
+    description: TIM1 counter stopped when core is halted
+    bit_offset: 11
+    bit_size: 1
+  - name: TIM8
+    description: TIM8 counter stopped when core is halted
+    bit_offset: 13
+    bit_size: 1
+  - name: TIM15
+    description: TIM15 counter stopped when core is halted
+    bit_offset: 16
+    bit_size: 1
+  - name: TIM16
+    description: TIM16 counter stopped when core is halted
+    bit_offset: 17
+    bit_size: 1
+  - name: TIM17
+    description: TIM17 counter stopped when core is halted
+    bit_offset: 18
+    bit_size: 1
+fieldset/CR:
+  description: Debug MCU configuration register
+  fields:
+  - name: DBG_STOP
+    description: Debug Stop mode
+    bit_offset: 1
+    bit_size: 1
+  - name: DBG_STANDBY
+    description: Debug Standby mode
+    bit_offset: 2
+    bit_size: 1
+  - name: TRACE_IOEN
+    description: Trace pin assignment control
+    bit_offset: 4
+    bit_size: 1
+  - name: TRACE_EN
+    description: Trace port and clock enable
+    bit_offset: 5
+    bit_size: 1
+  - name: TRACE_MODE
+    description: Trace pin assignment control
+    bit_offset: 6
+    bit_size: 2
+fieldset/IDCODE:
+  description: DBGMCU_IDCODE
+  fields:
+  - name: DEV_ID
+    description: Device identifier
+    bit_offset: 0
+    bit_size: 12
+  - name: REV_ID
+    description: Revision identifie
+    bit_offset: 16
+    bit_size: 16

stm32-data-gen/src/chips.rs

@@ -445,6 +445,7 @@ impl PeriMatcher {
             ("STM32L0.*:DBGMCU:.*", ("dbgmcu", "l0", "DBGMCU")),
             ("STM32L1.*:DBGMCU:.*", ("dbgmcu", "l1", "DBGMCU")),
             ("STM32L4.*:DBGMCU:.*", ("dbgmcu", "l4", "DBGMCU")),
+            ("STM32L5.*:DBGMCU:.*", ("dbgmcu", "l5", "DBGMCU")),
             ("STM32U5.*:DBGMCU:.*", ("dbgmcu", "u5", "DBGMCU")),
             ("STM32WBA.*:DBGMCU:.*", ("dbgmcu", "wba", "DBGMCU")),
             ("STM32WB.*:DBGMCU:.*", ("dbgmcu", "wb", "DBGMCU")),