updated l4plus and l5 rcc registers
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547b6114ad
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@ -311,7 +311,7 @@ fieldset/AHB2ENR:
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description: Random Number Generator clock enable
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description: Random Number Generator clock enable
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bit_offset: 18
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bit_offset: 18
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bit_size: 1
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bit_size: 1
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- name: OSPIMEN
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- name: OCTOSPIMEN
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description: OctoSPI IO manager clock enable
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description: OctoSPI IO manager clock enable
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bit_offset: 20
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bit_offset: 20
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bit_size: 1
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bit_size: 1
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@ -390,7 +390,7 @@ fieldset/AHB2RSTR:
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description: Random number generator reset
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description: Random number generator reset
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bit_offset: 18
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bit_offset: 18
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bit_size: 1
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bit_size: 1
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- name: OSPIMRST
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- name: OCTOSPIMRST
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description: OCTOSPI IO manager reset
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description: OCTOSPI IO manager reset
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bit_offset: 20
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bit_offset: 20
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bit_size: 1
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bit_size: 1
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@ -485,7 +485,7 @@ fieldset/AHB2SMENR:
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description: Random Number Generator clocks enable during Sleep and Stop modes
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description: Random Number Generator clocks enable during Sleep and Stop modes
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bit_offset: 18
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bit_offset: 18
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bit_size: 1
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bit_size: 1
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- name: OSPIMSMEN
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- name: OCTOSPIMSMEN
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description: OctoSPI IO manager clocks enable during Sleep and Stop modes
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description: OctoSPI IO manager clocks enable during Sleep and Stop modes
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bit_offset: 20
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bit_offset: 20
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bit_size: 1
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bit_size: 1
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@ -504,11 +504,11 @@ fieldset/AHB3ENR:
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description: Flexible memory controller clock enable
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description: Flexible memory controller clock enable
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bit_offset: 0
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bit_offset: 0
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bit_size: 1
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bit_size: 1
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- name: OSPI1EN
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- name: OCTOSPI1EN
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description: OctoSPI1 memory interface clock enable
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description: OctoSPI1 memory interface clock enable
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bit_offset: 8
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bit_offset: 8
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bit_size: 1
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bit_size: 1
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- name: OSPI2EN
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- name: OCTOSPI2EN
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description: OSPI2EN memory interface clock enable
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description: OSPI2EN memory interface clock enable
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bit_offset: 9
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bit_offset: 9
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bit_size: 1
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bit_size: 1
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@ -519,11 +519,11 @@ fieldset/AHB3RSTR:
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description: Flexible memory controller reset
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description: Flexible memory controller reset
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bit_offset: 0
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bit_offset: 0
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bit_size: 1
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bit_size: 1
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- name: OSPI1RST
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- name: OCTOSPI1RST
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description: OctoSPI1 memory interface reset
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description: OctoSPI1 memory interface reset
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bit_offset: 8
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bit_offset: 8
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bit_size: 1
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bit_size: 1
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- name: OSPI2RST
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- name: OCTOSPI2RST
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description: OctOSPI2 memory interface reset
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description: OctOSPI2 memory interface reset
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bit_offset: 9
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bit_offset: 9
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bit_size: 1
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bit_size: 1
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@ -534,11 +534,11 @@ fieldset/AHB3SMENR:
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description: Flexible memory controller clocks enable during Sleep and Stop modes
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description: Flexible memory controller clocks enable during Sleep and Stop modes
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bit_offset: 0
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bit_offset: 0
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bit_size: 1
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bit_size: 1
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- name: OSPI1SMEN
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- name: OCTOSPI1SMEN
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description: OctoSPI1 memory interface clocks enable during Sleep and Stop modes
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description: OctoSPI1 memory interface clocks enable during Sleep and Stop modes
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bit_offset: 8
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bit_offset: 8
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bit_size: 1
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bit_size: 1
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- name: OCTOSPI2
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- name: OCTOSPI2SMEN
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description: OctoSPI2 memory interface clocks enable during Sleep and Stop modes
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description: OctoSPI2 memory interface clocks enable during Sleep and Stop modes
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bit_offset: 9
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bit_offset: 9
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bit_size: 1
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bit_size: 1
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@ -1197,11 +1197,11 @@ fieldset/CCIPR2:
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description: division factor for LTDC clock
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description: division factor for LTDC clock
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bit_offset: 16
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bit_offset: 16
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bit_size: 2
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bit_size: 2
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- name: OSPISEL
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- name: OCTOSPISEL
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description: Octospi clock source selection
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description: Octospi clock source selection
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bit_offset: 20
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bit_offset: 20
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bit_size: 2
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bit_size: 2
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enum: OSPISEL
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enum: OCTOSPISEL
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fieldset/CFGR:
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fieldset/CFGR:
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description: Clock configuration register
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description: Clock configuration register
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fields:
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fields:
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@ -1962,7 +1962,7 @@ enum/MSIRGSEL:
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- name: CR
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- name: CR
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description: MSI Range is provided by MSIRANGE[3:0] in the RCC_CR register
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description: MSI Range is provided by MSIRANGE[3:0] in the RCC_CR register
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value: 1
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value: 1
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enum/OSPISEL:
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enum/OCTOSPISEL:
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bit_size: 2
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bit_size: 2
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variants:
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variants:
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- name: SYS
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- name: SYS
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@ -556,8 +556,8 @@ fieldset/AHB3ENR:
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description: Flexible memory controller clock enable
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description: Flexible memory controller clock enable
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bit_offset: 0
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bit_offset: 0
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bit_size: 1
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bit_size: 1
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- name: OSPI1EN
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- name: OCTOSPI1EN
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description: OSPI1EN
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description: OCTOSPI1EN
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bit_offset: 8
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bit_offset: 8
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bit_size: 1
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bit_size: 1
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fieldset/AHB3RSTR:
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fieldset/AHB3RSTR:
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@ -567,8 +567,8 @@ fieldset/AHB3RSTR:
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description: Flexible memory controller reset
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description: Flexible memory controller reset
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bit_offset: 0
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bit_offset: 0
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bit_size: 1
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bit_size: 1
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- name: OSPI1RST
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- name: OCTOSPI1RST
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description: OSPI1RST
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description: OCTOSPI1RST
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bit_offset: 8
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bit_offset: 8
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bit_size: 1
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bit_size: 1
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fieldset/AHB3SECSR:
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fieldset/AHB3SECSR:
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@ -578,8 +578,8 @@ fieldset/AHB3SECSR:
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description: FSMCSECF
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description: FSMCSECF
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bit_offset: 0
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bit_offset: 0
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bit_size: 1
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bit_size: 1
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- name: OSPI1SECF
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- name: OCTOSPI1SECF
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description: OSPI1SECF
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description: OCTOSPI1SECF
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bit_offset: 8
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bit_offset: 8
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bit_size: 1
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bit_size: 1
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fieldset/AHB3SMENR:
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fieldset/AHB3SMENR:
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@ -589,8 +589,8 @@ fieldset/AHB3SMENR:
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description: Flexible memory controller clocks enable during Sleep and Stop modes
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description: Flexible memory controller clocks enable during Sleep and Stop modes
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bit_offset: 0
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bit_offset: 0
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bit_size: 1
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bit_size: 1
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- name: OSPI1SMEN
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- name: OCTOSPI1SMEN
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description: OSPI1SMEN
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description: OCTOSPI1SMEN
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bit_offset: 8
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bit_offset: 8
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bit_size: 1
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bit_size: 1
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fieldset/APB1ENR1:
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fieldset/APB1ENR1:
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@ -1412,7 +1412,7 @@ fieldset/CCIPR2:
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description: SDMMC clock selection
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description: SDMMC clock selection
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bit_offset: 14
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bit_offset: 14
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bit_size: 1
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bit_size: 1
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- name: OSPISEL
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- name: OCTOSPISEL
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description: Octospi clock source selection
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description: Octospi clock source selection
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bit_offset: 20
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bit_offset: 20
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bit_size: 2
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bit_size: 2
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