updated l4plus and l5 rcc registers

This commit is contained in:
Karun Koppula 2024-04-02 15:05:12 -04:00
parent 547b6114ad
commit c4be0da68c
2 changed files with 21 additions and 21 deletions

View File

@ -311,7 +311,7 @@ fieldset/AHB2ENR:
description: Random Number Generator clock enable description: Random Number Generator clock enable
bit_offset: 18 bit_offset: 18
bit_size: 1 bit_size: 1
- name: OSPIMEN - name: OCTOSPIMEN
description: OctoSPI IO manager clock enable description: OctoSPI IO manager clock enable
bit_offset: 20 bit_offset: 20
bit_size: 1 bit_size: 1
@ -390,7 +390,7 @@ fieldset/AHB2RSTR:
description: Random number generator reset description: Random number generator reset
bit_offset: 18 bit_offset: 18
bit_size: 1 bit_size: 1
- name: OSPIMRST - name: OCTOSPIMRST
description: OCTOSPI IO manager reset description: OCTOSPI IO manager reset
bit_offset: 20 bit_offset: 20
bit_size: 1 bit_size: 1
@ -485,7 +485,7 @@ fieldset/AHB2SMENR:
description: Random Number Generator clocks enable during Sleep and Stop modes description: Random Number Generator clocks enable during Sleep and Stop modes
bit_offset: 18 bit_offset: 18
bit_size: 1 bit_size: 1
- name: OSPIMSMEN - name: OCTOSPIMSMEN
description: OctoSPI IO manager clocks enable during Sleep and Stop modes description: OctoSPI IO manager clocks enable during Sleep and Stop modes
bit_offset: 20 bit_offset: 20
bit_size: 1 bit_size: 1
@ -504,11 +504,11 @@ fieldset/AHB3ENR:
description: Flexible memory controller clock enable description: Flexible memory controller clock enable
bit_offset: 0 bit_offset: 0
bit_size: 1 bit_size: 1
- name: OSPI1EN - name: OCTOSPI1EN
description: OctoSPI1 memory interface clock enable description: OctoSPI1 memory interface clock enable
bit_offset: 8 bit_offset: 8
bit_size: 1 bit_size: 1
- name: OSPI2EN - name: OCTOSPI2EN
description: OSPI2EN memory interface clock enable description: OSPI2EN memory interface clock enable
bit_offset: 9 bit_offset: 9
bit_size: 1 bit_size: 1
@ -519,11 +519,11 @@ fieldset/AHB3RSTR:
description: Flexible memory controller reset description: Flexible memory controller reset
bit_offset: 0 bit_offset: 0
bit_size: 1 bit_size: 1
- name: OSPI1RST - name: OCTOSPI1RST
description: OctoSPI1 memory interface reset description: OctoSPI1 memory interface reset
bit_offset: 8 bit_offset: 8
bit_size: 1 bit_size: 1
- name: OSPI2RST - name: OCTOSPI2RST
description: OctOSPI2 memory interface reset description: OctOSPI2 memory interface reset
bit_offset: 9 bit_offset: 9
bit_size: 1 bit_size: 1
@ -534,11 +534,11 @@ fieldset/AHB3SMENR:
description: Flexible memory controller clocks enable during Sleep and Stop modes description: Flexible memory controller clocks enable during Sleep and Stop modes
bit_offset: 0 bit_offset: 0
bit_size: 1 bit_size: 1
- name: OSPI1SMEN - name: OCTOSPI1SMEN
description: OctoSPI1 memory interface clocks enable during Sleep and Stop modes description: OctoSPI1 memory interface clocks enable during Sleep and Stop modes
bit_offset: 8 bit_offset: 8
bit_size: 1 bit_size: 1
- name: OCTOSPI2 - name: OCTOSPI2SMEN
description: OctoSPI2 memory interface clocks enable during Sleep and Stop modes description: OctoSPI2 memory interface clocks enable during Sleep and Stop modes
bit_offset: 9 bit_offset: 9
bit_size: 1 bit_size: 1
@ -1197,11 +1197,11 @@ fieldset/CCIPR2:
description: division factor for LTDC clock description: division factor for LTDC clock
bit_offset: 16 bit_offset: 16
bit_size: 2 bit_size: 2
- name: OSPISEL - name: OCTOSPISEL
description: Octospi clock source selection description: Octospi clock source selection
bit_offset: 20 bit_offset: 20
bit_size: 2 bit_size: 2
enum: OSPISEL enum: OCTOSPISEL
fieldset/CFGR: fieldset/CFGR:
description: Clock configuration register description: Clock configuration register
fields: fields:
@ -1962,7 +1962,7 @@ enum/MSIRGSEL:
- name: CR - name: CR
description: MSI Range is provided by MSIRANGE[3:0] in the RCC_CR register description: MSI Range is provided by MSIRANGE[3:0] in the RCC_CR register
value: 1 value: 1
enum/OSPISEL: enum/OCTOSPISEL:
bit_size: 2 bit_size: 2
variants: variants:
- name: SYS - name: SYS

View File

@ -556,8 +556,8 @@ fieldset/AHB3ENR:
description: Flexible memory controller clock enable description: Flexible memory controller clock enable
bit_offset: 0 bit_offset: 0
bit_size: 1 bit_size: 1
- name: OSPI1EN - name: OCTOSPI1EN
description: OSPI1EN description: OCTOSPI1EN
bit_offset: 8 bit_offset: 8
bit_size: 1 bit_size: 1
fieldset/AHB3RSTR: fieldset/AHB3RSTR:
@ -567,8 +567,8 @@ fieldset/AHB3RSTR:
description: Flexible memory controller reset description: Flexible memory controller reset
bit_offset: 0 bit_offset: 0
bit_size: 1 bit_size: 1
- name: OSPI1RST - name: OCTOSPI1RST
description: OSPI1RST description: OCTOSPI1RST
bit_offset: 8 bit_offset: 8
bit_size: 1 bit_size: 1
fieldset/AHB3SECSR: fieldset/AHB3SECSR:
@ -578,8 +578,8 @@ fieldset/AHB3SECSR:
description: FSMCSECF description: FSMCSECF
bit_offset: 0 bit_offset: 0
bit_size: 1 bit_size: 1
- name: OSPI1SECF - name: OCTOSPI1SECF
description: OSPI1SECF description: OCTOSPI1SECF
bit_offset: 8 bit_offset: 8
bit_size: 1 bit_size: 1
fieldset/AHB3SMENR: fieldset/AHB3SMENR:
@ -589,8 +589,8 @@ fieldset/AHB3SMENR:
description: Flexible memory controller clocks enable during Sleep and Stop modes description: Flexible memory controller clocks enable during Sleep and Stop modes
bit_offset: 0 bit_offset: 0
bit_size: 1 bit_size: 1
- name: OSPI1SMEN - name: OCTOSPI1SMEN
description: OSPI1SMEN description: OCTOSPI1SMEN
bit_offset: 8 bit_offset: 8
bit_size: 1 bit_size: 1
fieldset/APB1ENR1: fieldset/APB1ENR1:
@ -1412,7 +1412,7 @@ fieldset/CCIPR2:
description: SDMMC clock selection description: SDMMC clock selection
bit_offset: 14 bit_offset: 14
bit_size: 1 bit_size: 1
- name: OSPISEL - name: OCTOSPISEL
description: Octospi clock source selection description: Octospi clock source selection
bit_offset: 20 bit_offset: 20
bit_size: 2 bit_size: 2