diff --git a/data/registers/rcc_f1.yaml b/data/registers/rcc_f1.yaml
index 4244347..3b7a5d2 100644
--- a/data/registers/rcc_f1.yaml
+++ b/data/registers/rcc_f1.yaml
@@ -85,15 +85,15 @@ fieldset/AHBENR:
       description: USB OTG FS clock enable
       bit_offset: 12
       bit_size: 1
-    - name: ETHMACEN
+    - name: ETHEN
       description: Ethernet MAC clock enable
       bit_offset: 14
       bit_size: 1
-    - name: ETHMACTXEN
+    - name: ETHTXEN
       description: Ethernet MAC TX clock enable
       bit_offset: 15
       bit_size: 1
-    - name: ETHMACRXEN
+    - name: ETHRXEN
       description: Ethernet MAC RX clock enable
       bit_offset: 16
       bit_size: 1
@@ -104,7 +104,7 @@ fieldset/AHBRSTR:
       description: USB OTG FS reset
       bit_offset: 12
       bit_size: 1
-    - name: ETHMACRST
+    - name: ETHRST
       description: Ethernet MAC reset
       bit_offset: 14
       bit_size: 1
diff --git a/data/registers/rcc_f1cl.yaml b/data/registers/rcc_f1cl.yaml
index dbb7dfa..ff4bbf3 100644
--- a/data/registers/rcc_f1cl.yaml
+++ b/data/registers/rcc_f1cl.yaml
@@ -85,15 +85,15 @@ fieldset/AHBENR:
       description: USB OTG FS clock enable
       bit_offset: 12
       bit_size: 1
-    - name: ETHMACEN
+    - name: ETHEN
       description: Ethernet MAC clock enable
       bit_offset: 14
       bit_size: 1
-    - name: ETHMACTXEN
+    - name: ETHTXEN
       description: Ethernet MAC TX clock enable
       bit_offset: 15
       bit_size: 1
-    - name: ETHMACRXEN
+    - name: ETHRXEN
       description: Ethernet MAC RX clock enable
       bit_offset: 16
       bit_size: 1
@@ -104,7 +104,7 @@ fieldset/AHBRSTR:
       description: USB OTG FS reset
       bit_offset: 12
       bit_size: 1
-    - name: ETHMACRST
+    - name: ETHRST
       description: Ethernet MAC reset
       bit_offset: 14
       bit_size: 1
diff --git a/data/registers/rcc_f2.yaml b/data/registers/rcc_f2.yaml
index 63e9555..7517af8 100644
--- a/data/registers/rcc_f2.yaml
+++ b/data/registers/rcc_f2.yaml
@@ -149,19 +149,19 @@ fieldset/AHB1ENR:
       description: DMA2 clock enable
       bit_offset: 22
       bit_size: 1
-    - name: ETHMACEN
+    - name: ETHEN
       description: Ethernet MAC clock enable
       bit_offset: 25
       bit_size: 1
-    - name: ETHMACTXEN
+    - name: ETHTXEN
       description: Ethernet Transmission clock enable
       bit_offset: 26
       bit_size: 1
-    - name: ETHMACRXEN
+    - name: ETHRXEN
       description: Ethernet Reception clock enable
       bit_offset: 27
       bit_size: 1
-    - name: ETHMACPTPEN
+    - name: ETHPTPEN
       description: Ethernet PTP clock enable
       bit_offset: 28
       bit_size: 1
@@ -240,19 +240,19 @@ fieldset/AHB1LPENR:
       description: DMA2 clock enable during Sleep mode
       bit_offset: 22
       bit_size: 1
-    - name: ETHMACLPEN
+    - name: ETHLPEN
       description: Ethernet MAC clock enable during Sleep mode
       bit_offset: 25
       bit_size: 1
-    - name: ETHMACTXLPEN
+    - name: ETHTXLPEN
       description: Ethernet transmission clock enable during Sleep mode
       bit_offset: 26
       bit_size: 1
-    - name: ETHMACRXLPEN
+    - name: ETHRXLPEN
       description: Ethernet reception clock enable during Sleep mode
       bit_offset: 27
       bit_size: 1
-    - name: ETHMACPTPLPEN
+    - name: ETHPTPLPEN
       description: Ethernet PTP clock enable during Sleep mode
       bit_offset: 28
       bit_size: 1
@@ -315,7 +315,7 @@ fieldset/AHB1RSTR:
       description: DMA2 reset
       bit_offset: 22
       bit_size: 1
-    - name: ETHMACRST
+    - name: ETHRST
       description: Ethernet MAC reset
       bit_offset: 25
       bit_size: 1
diff --git a/data/registers/rcc_f4.yaml b/data/registers/rcc_f4.yaml
index 08512a0..5004958 100644
--- a/data/registers/rcc_f4.yaml
+++ b/data/registers/rcc_f4.yaml
@@ -181,19 +181,19 @@ fieldset/AHB1ENR:
       description: DMA2D clock enable
       bit_offset: 23
       bit_size: 1
-    - name: ETHMACEN
+    - name: ETHEN
       description: Ethernet MAC clock enable
       bit_offset: 25
       bit_size: 1
-    - name: ETHMACTXEN
+    - name: ETHTXEN
       description: Ethernet Transmission clock enable
       bit_offset: 26
       bit_size: 1
-    - name: ETHMACRXEN
+    - name: ETHRXEN
       description: Ethernet Reception clock enable
       bit_offset: 27
       bit_size: 1
-    - name: ETHMACPTPEN
+    - name: ETHPTPEN
       description: Ethernet PTP clock enable
       bit_offset: 28
       bit_size: 1
@@ -288,19 +288,19 @@ fieldset/AHB1LPENR:
       description: DMA2D clock enable during Sleep mode
       bit_offset: 23
       bit_size: 1
-    - name: ETHMACLPEN
+    - name: ETHLPEN
       description: Ethernet MAC clock enable during Sleep mode
       bit_offset: 25
       bit_size: 1
-    - name: ETHMACTXLPEN
+    - name: ETHTXLPEN
       description: Ethernet transmission clock enable during Sleep mode
       bit_offset: 26
       bit_size: 1
-    - name: ETHMACRXLPEN
+    - name: ETHRXLPEN
       description: Ethernet reception clock enable during Sleep mode
       bit_offset: 27
       bit_size: 1
-    - name: ETHMACPTPLPEN
+    - name: ETHPTPLPEN
       description: Ethernet PTP clock enable during Sleep mode
       bit_offset: 28
       bit_size: 1
@@ -379,7 +379,7 @@ fieldset/AHB1RSTR:
       description: DMA2D reset
       bit_offset: 23
       bit_size: 1
-    - name: ETHMACRST
+    - name: ETHRST
       description: Ethernet MAC reset
       bit_offset: 25
       bit_size: 1