From 6f528063d2122e6b10a0f4af5665cff02cd58594 Mon Sep 17 00:00:00 2001
From: Sean Bolton <sean@smbolton.com>
Date: Tue, 21 Jun 2022 08:08:53 -0700
Subject: [PATCH 1/2] Clean up regex string literals

---
 stm32data/__main__.py | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/stm32data/__main__.py b/stm32data/__main__.py
index 42097f9..193f5bb 100755
--- a/stm32data/__main__.py
+++ b/stm32data/__main__.py
@@ -15,7 +15,7 @@ from stm32data.util import *
 
 def corename(d):
     # print("CHECKING CORENAME", d)
-    if m := re.match('.*Cortex-M(\d+)(\+?)\s*(.*)', d):
+    if m := re.match(r'.*Cortex-M(\d+)(\+?)\s*(.*)', d):
         name = "cm" + str(m.group(1))
         if m.group(2) == "+":
             name += "p"
@@ -273,7 +273,7 @@ perimap = [
     ('.*:FSMC:.*', ('fsmc', 'v1', 'FSMC')),
     ('STM32H7.*:FMC:.*', ('fmc', 'h7', 'FMC')),
 
-    ('.*LPTIM\d.*:G0xx_lptimer1_v1_4', ('lptim', 'g0', 'LPTIM')),
+    (r'.*LPTIM\d.*:G0xx_lptimer1_v1_4', ('lptim', 'g0', 'LPTIM')),
 
     ('STM32H7.*:TIM1:.*', ('timer', 'v1', 'TIM_ADV')),
     ('STM32H7.*:TIM2:.*', ('timer', 'v1', 'TIM_GP32')),
@@ -289,7 +289,7 @@ perimap = [
 
     ('STM32F7.*:TIM1:.*', ('timer', 'v1', 'TIM_ADV')),
     ('STM32F7.*:TIM8:.*', ('timer', 'v1', 'TIM_ADV')),
-    ('.*TIM\d.*:gptimer.*', ('timer', 'v1', 'TIM_GP16')),
+    (r'.*TIM\d.*:gptimer.*', ('timer', 'v1', 'TIM_GP16')),
 
     ('STM32F0.*:DBGMCU:.*', ('dbgmcu', 'f0', 'DBGMCU')),
     ('STM32F1.*:DBGMCU:.*', ('dbgmcu', 'f1', 'DBGMCU')),
@@ -313,8 +313,8 @@ perimap = [
     ('.*:IPCC:v1_0', ('ipcc', 'v1', 'IPCC')),
     ('.*:DMAMUX.*', ('dmamux', 'v1', 'DMAMUX')),
 
-    ('.*:GPDMA\d?:.*', ('gpdma', 'v1', 'GPDMA')),
-    ('.*:BDMA\d?:.*', ('bdma', 'v1', 'DMA')),
+    (r'.*:GPDMA\d?:.*', ('gpdma', 'v1', 'GPDMA')),
+    (r'.*:BDMA\d?:.*', ('bdma', 'v1', 'DMA')),
     ('STM32H7.*:DMA2D:DMA2D:dma2d1_v1_0', ('dma2d', 'v2', 'DMA2D')),
     ('.*:DMA2D:dma2d1_v1_0', ('dma2d', 'v1', 'DMA2D')),
     ('STM32L4[PQRS].*:DMA.*', ('bdma', 'v1', 'DMA')),  # L4+
@@ -1138,7 +1138,7 @@ def parse_dma():
                 dmamux_channel = 0
                 for n in dma_peri_name.split(","):
                     n = n.strip()
-                    if result := re.match('.*' + n + '_(Channel|Stream)\[(\d+)-(\d+)\]', channels[0]['@Name']):
+                    if result := re.match('.*' + n + r'_(Channel|Stream)\[(\d+)-(\d+)\]', channels[0]['@Name']):
                         low = int(result.group(2))
                         high = int(result.group(3))
                         for i in range(low, high + 1):
@@ -1280,7 +1280,7 @@ def parse_rcc_regs():
         for (key, body) in y.items():
             # Some chip families have a separate bus for GPIO so it's not attached to the AHB/APB
             # bus but an GPIO bus. Use the GPIO as the clock for these chips.
-            if m := re.match('^fieldset/((A[PH]B\d?)|GPIO)[LH]?ENR\d?$', key):
+            if m := re.match(r'^fieldset/((A[PH]B\d?)|GPIO)[LH]?ENR\d?$', key):
                 reg = removeprefix(key, 'fieldset/')
                 clock = m.group(1)
                 clock = clock_renames.get(clock, clock)
@@ -1289,7 +1289,7 @@ def parse_rcc_regs():
                         peri = removesuffix(field['name'], 'EN')
 
                         # Timers are a bit special, they may have a x2 freq
-                        peri_clock = f'{clock}_TIM' if re.match('^TIM\d+$', peri) else clock
+                        peri_clock = f'{clock}_TIM' if re.match(r'^TIM\d+$', peri) else clock
                         res = {
                             'clock': peri_clock,
                             'enable': {

From f4de61a1e03d9de67070ad2bb5bf8f16b7034866 Mon Sep 17 00:00:00 2001
From: Sean Bolton <sean@smbolton.com>
Date: Tue, 21 Jun 2022 08:34:21 -0700
Subject: [PATCH 2/2] Fix TIM timer types across all lines

---
 stm32data/__main__.py | 21 +++++++++------------
 1 file changed, 9 insertions(+), 12 deletions(-)

diff --git a/stm32data/__main__.py b/stm32data/__main__.py
index 193f5bb..eedb422 100755
--- a/stm32data/__main__.py
+++ b/stm32data/__main__.py
@@ -275,20 +275,17 @@ perimap = [
 
     (r'.*LPTIM\d.*:G0xx_lptimer1_v1_4', ('lptim', 'g0', 'LPTIM')),
 
-    ('STM32H7.*:TIM1:.*', ('timer', 'v1', 'TIM_ADV')),
-    ('STM32H7.*:TIM2:.*', ('timer', 'v1', 'TIM_GP32')),
-    ('STM32H7.*:TIM5:.*', ('timer', 'v1', 'TIM_GP32')),
-    ('STM32H7.*:TIM6:.*', ('timer', 'v1', 'TIM_BASIC')),
-    ('STM32H7.*:TIM7:.*', ('timer', 'v1', 'TIM_BASIC')),
-    ('STM32H7.*:TIM8:.*', ('timer', 'v1', 'TIM_ADV')),
+    ('STM32F1.*:TIM(1|8):.*', ('timer', 'v1', 'TIM_ADV')),
+    ('STM32F1.*:TIM(2|5):.*', ('timer', 'v1', 'TIM_GP16')),
+    ('STM32F1.*:TIM(6|7):.*', ('timer', 'v1', 'TIM_BASIC')),
 
-    ('STM32F3.*:TIM(6|7){1}:.*', ('timer', 'v1', 'TIM_BASIC')),
-    ('STM32F3.*:TIM(3|4|15|16|17){1}:.*', ('timer', 'v1', 'TIM_GP16')),
-    ('STM32F3.*:TIM2:.*', ('timer', 'v1', 'TIM_GP32')),
-    ('STM32F3.*:TIM(1|8|20){1}:.*', ('timer', 'v1', 'TIM_ADV')),
+    ('STM32L0.*:TIM2:.*', ('timer', 'v1', 'TIM_GP16')),
 
-    ('STM32F7.*:TIM1:.*', ('timer', 'v1', 'TIM_ADV')),
-    ('STM32F7.*:TIM8:.*', ('timer', 'v1', 'TIM_ADV')),
+    ('STM32U5.*:TIM(2|3|4|5):.*', ('timer', 'v1', 'TIM_GP32')),
+
+    ('STM32.*:TIM(1|8|20):.*', ('timer', 'v1', 'TIM_ADV')),
+    ('STM32.*:TIM(2|5|23|24):.*', ('timer', 'v1', 'TIM_GP32')),
+    ('STM32.*:TIM(6|7|18):.*', ('timer', 'v1', 'TIM_BASIC')),
     (r'.*TIM\d.*:gptimer.*', ('timer', 'v1', 'TIM_GP16')),
 
     ('STM32F0.*:DBGMCU:.*', ('dbgmcu', 'f0', 'DBGMCU')),