H5: rename DAC12EN to DAC1EN to match peripheral name

data/registers/rcc_h5.yaml

@@ -378,7 +378,7 @@ fieldset/AHB2ENR:
     description: "ADC1 and 2 peripherals clock enabled\r Set and reset by software."
     bit_offset: 10
     bit_size: 1
-  - name: DAC12EN
+  - name: DAC1EN
     description: "DAC clock enable\r Set and reset by software."
     bit_offset: 11
     bit_size: 1
@@ -457,7 +457,7 @@ fieldset/AHB2LPENR:
     description: "ADC1 and 2 peripherals clock enable during sleep mode\r Set and reset by software."
     bit_offset: 10
     bit_size: 1
-  - name: DAC12LPEN
+  - name: DAC1LPEN
     description: "DAC clock enable during sleep mode\r Set and reset by software."
     bit_offset: 11
     bit_size: 1
@@ -536,7 +536,7 @@ fieldset/AHB2RSTR:
     description: "ADC1 and 2 blocks reset\r Set and reset by software."
     bit_offset: 10
     bit_size: 1
-  - name: DAC12RST
+  - name: DAC1RST
     description: "DAC block reset\r Set and reset by software."
     bit_offset: 11
     bit_size: 1

data/registers/rcc_h50.yaml

@@ -270,7 +270,7 @@ fieldset/AHB2ENR:
     description: "ADC1 peripherals clock enabled\r Set and reset by software."
     bit_offset: 10
     bit_size: 1
-  - name: DAC12EN
+  - name: DAC1EN
     description: "DAC clock enable\r Set and reset by software."
     bit_offset: 11
     bit_size: 1
@@ -313,7 +313,7 @@ fieldset/AHB2LPENR:
     description: "ADC1 peripherals clock enable during sleep mode\r Set and reset by software."
     bit_offset: 10
     bit_size: 1
-  - name: DAC12LPEN
+  - name: DAC1LPEN
     description: "DAC clock enable during sleep mode\r Set and reset by software."
     bit_offset: 11
     bit_size: 1
@@ -356,7 +356,7 @@ fieldset/AHB2RSTR:
     description: "ADC1 block reset\r Set and reset by software."
     bit_offset: 10
     bit_size: 1
-  - name: DAC12RST
+  - name: DAC1RST
     description: "DAC block reset\r Set and reset by software."
     bit_offset: 11
     bit_size: 1