From bcc9b6bf9fa195e91625849efc4ba473d9ace4e9 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 23 Oct 2023 01:02:53 +0200 Subject: [PATCH] rcc/wb: add misrange enum --- data/registers/rcc_wb.yaml | 40 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/data/registers/rcc_wb.yaml b/data/registers/rcc_wb.yaml index b3ff958..9acca78 100644 --- a/data/registers/rcc_wb.yaml +++ b/data/registers/rcc_wb.yaml @@ -1366,6 +1366,7 @@ fieldset/CR: description: MSI clock ranges bit_offset: 4 bit_size: 4 + enum: MSIRANGE - name: HSION description: HSI clock enabled bit_offset: 8 @@ -1884,6 +1885,45 @@ enum/MCOSEL: - name: HSE_UNSTABLE description: HSE clock selected (before stabilization, after HSEON = 1) value: 12 +enum/MSIRANGE: + bit_size: 4 + variants: + - name: Range100K + description: range 0 around 100 kHz + value: 0 + - name: Range200K + description: range 1 around 200 kHz + value: 1 + - name: Range400K + description: range 2 around 400 kHz + value: 2 + - name: Range800K + description: range 3 around 800 kHz + value: 3 + - name: Range1M + description: range 4 around 1 MHz + value: 4 + - name: Range2M + description: range 5 around 2 MHz + value: 5 + - name: Range4M + description: range 6 around 4 MHz + value: 6 + - name: Range8M + description: range 7 around 8 MHz + value: 7 + - name: Range16M + description: range 8 around 16 MHz + value: 8 + - name: Range24M + description: range 9 around 24 MHz + value: 9 + - name: Range32M + description: range 10 around 32 MHz + value: 10 + - name: Range48M + description: range 11 around 48 MHz + value: 11 enum/PLLM: bit_size: 3 variants: