From babbe782f3ff7c24ec5ffe9230c727726661f8a8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Timo=20Kr=C3=B6ger?= Date: Tue, 3 Aug 2021 14:31:36 +0200 Subject: [PATCH] rcc_l0: Remove non existing RCC bits ## firewall l0x0, l0x1: FWEN - Firewall clock enable bit l0x2, l0x3: MIFIEN - MiFaRe Firewall clock enable bit action: none ## watchdog peripheral: WWDG WWDGRST vs WWDRST action: remove ## CRS vs CRC l0x2, l0x3: CRC reset is wrong action: remove duplicate CRC bit ## LPUART12RST vs USART2RST action: rename, it sholud be USART2 --- data/registers/rcc_l0.yaml | 15 --------------- 1 file changed, 15 deletions(-) diff --git a/data/registers/rcc_l0.yaml b/data/registers/rcc_l0.yaml index a96b843..a692aac 100644 --- a/data/registers/rcc_l0.yaml +++ b/data/registers/rcc_l0.yaml @@ -816,11 +816,6 @@ fieldset/APB1RSTR: description: I2C2 reset enum_write: LPTIMRSTW name: I2C2RST - - bit_offset: 27 - bit_size: 1 - description: CRC reset - enum_write: LPTIMRSTW - name: CRCRST - bit_offset: 28 bit_size: 1 description: Power interface reset @@ -836,16 +831,6 @@ fieldset/APB1RSTR: description: I2C3 reset enum_write: LPTIMRSTW name: I2C3RST - - bit_offset: 11 - bit_size: 1 - description: Window watchdog reset - enum_write: LPTIMRSTW - name: WWDRST - - bit_offset: 17 - bit_size: 1 - description: UART2 reset - enum_write: LPTIMRSTW - name: LPUART12RST - bit_offset: 23 bit_size: 1 description: USB reset