apply transform
This commit is contained in:
eZio Pan
parent
2d52f3bfb1
commit
b97f0a833e
@ -1,4 +1,4 @@
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block/OTFDEC1:
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block/OTFDEC:
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description: On-The-Fly Decryption engine.
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items:
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- name: CR
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@ -9,150 +9,12 @@ block/OTFDEC1:
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description: OTFDEC_PRIVCFGR.
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byte_offset: 16
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fieldset: PRIVCFGR
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- name: R1CFGR
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description: OTFDEC region 1 configuration register.
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- name: Region
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array:
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len: 4
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stride: 48
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byte_offset: 32
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fieldset: R1CFGR
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- name: R1STARTADDR
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description: OTFDEC region 1 start address register.
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byte_offset: 36
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fieldset: R1STARTADDR
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- name: R1ENDADDR
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description: OTFDEC region 1 end address register.
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byte_offset: 40
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fieldset: R1ENDADDR
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- name: R1NONCER0
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description: OTFDEC region 1 nonce register 0.
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byte_offset: 44
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fieldset: R1NONCER0
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- name: R1NONCER1
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description: OTFDEC region 1 nonce register 1.
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byte_offset: 48
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fieldset: R1NONCER1
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- name: R1KEYR0
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description: OTFDEC region 1 key register 0.
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byte_offset: 52
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fieldset: R1KEYR0
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- name: R1KEYR1
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description: OTFDEC region 1 key register 1.
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byte_offset: 56
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fieldset: R1KEYR1
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- name: R1KEYR2
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description: OTFDEC region 1 key register 2.
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byte_offset: 60
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fieldset: R1KEYR2
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- name: R1KEYR3
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description: OTFDEC region 1 key register 3.
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byte_offset: 64
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fieldset: R1KEYR3
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- name: R2CFGR
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description: OTFDEC region 2 configuration register.
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byte_offset: 80
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fieldset: R2CFGR
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- name: R2STARTADDR
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description: OTFDEC region 2 start address register.
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byte_offset: 84
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fieldset: R2STARTADDR
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- name: R2ENDADDR
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description: OTFDEC region 2 end address register.
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byte_offset: 88
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fieldset: R2ENDADDR
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- name: R2NONCER0
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description: OTFDEC region 2 nonce register 0.
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byte_offset: 92
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fieldset: R2NONCER0
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- name: R2NONCER1
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description: OTFDEC region 2 nonce register 1.
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byte_offset: 96
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fieldset: R2NONCER1
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- name: R2KEYR0
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description: OTFDEC region 2 key register 0.
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byte_offset: 100
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fieldset: R2KEYR0
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- name: R2KEYR1
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description: OTFDEC region 2 key register 1.
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byte_offset: 104
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fieldset: R2KEYR1
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- name: R2KEYR2
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description: OTFDEC region 2 key register 2.
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byte_offset: 108
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fieldset: R2KEYR2
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- name: R2KEYR3
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description: OTFDEC region 2 key register 3.
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byte_offset: 112
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fieldset: R2KEYR3
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- name: R3CFGR
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description: OTFDEC region 3 configuration register.
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byte_offset: 128
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fieldset: R3CFGR
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- name: R3STARTADDR
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description: OTFDEC region 3 start address register.
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byte_offset: 132
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fieldset: R3STARTADDR
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- name: R3ENDADDR
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description: OTFDEC region 3 end address register.
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byte_offset: 136
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fieldset: R3ENDADDR
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- name: R3NONCER0
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description: OTFDEC region 3 nonce register 0.
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byte_offset: 140
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fieldset: R3NONCER0
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- name: R3NONCER1
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description: OTFDEC region 3 nonce register 1.
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byte_offset: 144
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fieldset: R3NONCER1
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- name: R3KEYR0
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description: OTFDEC region 3 key register 0.
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byte_offset: 148
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fieldset: R3KEYR0
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- name: R3KEYR1
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description: OTFDEC region 3 key register 1.
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byte_offset: 152
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fieldset: R3KEYR1
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- name: R3KEYR2
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description: OTFDEC region 3 key register 2.
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byte_offset: 156
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fieldset: R3KEYR2
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- name: R3KEYR3
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description: OTFDEC region 3 key register 3.
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byte_offset: 160
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fieldset: R3KEYR3
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- name: R4CFGR
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description: OTFDEC region 4 configuration register.
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byte_offset: 176
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fieldset: R4CFGR
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- name: R4STARTADDR
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description: OTFDEC region 4 start address register.
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byte_offset: 180
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fieldset: R4STARTADDR
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- name: R4ENDADDR
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description: OTFDEC region 4 end address register.
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byte_offset: 184
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fieldset: R4ENDADDR
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- name: R4NONCER0
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description: OTFDEC region 4 nonce register 0.
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byte_offset: 188
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fieldset: R4NONCER0
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- name: R4NONCER1
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description: OTFDEC region 4 nonce register 1.
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byte_offset: 192
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fieldset: R4NONCER1
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- name: R4KEYR0
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description: OTFDEC region 4 key register 0.
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byte_offset: 196
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fieldset: R4KEYR0
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- name: R4KEYR1
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description: OTFDEC region 4 key register 1.
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byte_offset: 200
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fieldset: R4KEYR1
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- name: R4KEYR2
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description: OTFDEC region 4 key register 2.
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byte_offset: 204
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fieldset: R4KEYR2
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- name: R4KEYR3
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description: OTFDEC region 4 key register 3.
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byte_offset: 208
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fieldset: R4KEYR3
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block: Region
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- name: ISR
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description: OTFDEC interrupt status register.
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byte_offset: 768
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@ -165,6 +27,30 @@ block/OTFDEC1:
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description: OTFDEC interrupt enable register.
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byte_offset: 776
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fieldset: IER
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block/Region:
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items:
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- name: CFGR
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description: OTFDEC region 3 configuration register.
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byte_offset: 0
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fieldset: RegionCFGR
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- name: STARTADDR
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description: OTFDEC region 3 start address register.
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byte_offset: 4
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- name: ENDADDR
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description: OTFDEC region 3 end address register.
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byte_offset: 8
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- name: NONCER
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description: OTFDEC region 3 nonce register 0.
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array:
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len: 2
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stride: 4
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byte_offset: 12
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- name: KEYR
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description: OTFDEC region 3 key register 0.
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array:
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len: 4
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stride: 4
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byte_offset: 20
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fieldset/CR:
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description: OTFDEC control register.
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fields:
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@ -224,173 +110,7 @@ fieldset/PRIVCFGR:
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description: 'Privileged access protection. Unprivileged read accesses to registers return zeros Unprivileged write accesses to registers are ignored. Note: This bit can only be written in privileged mode. There is no limitations on reads.'
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bit_offset: 0
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bit_size: 1
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fieldset/R1CFGR:
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description: OTFDEC region 1 configuration register.
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fields:
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- name: REG_EN
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description: 'region on-the-fly decryption enable Note: Garbage is decrypted if region context (version, key, nonce) is not valid when this bit is set.'
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bit_offset: 0
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bit_size: 1
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- name: CONFIGLOCK
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description: 'region config lock Note: This bit is set once. If this bit is set, it can only be reset to 0 if OTFDEC is reset. Setting this bit forces KEYLOCK bit to 1.'
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bit_offset: 1
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bit_size: 1
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- name: KEYLOCK
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description: 'region key lock Note: This bit is set once: if this bit is set, it can only be reset to 0 if the OTFDEC is reset.'
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bit_offset: 2
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bit_size: 1
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- name: MODE
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description: 'operating mode This bitfield selects the OTFDEC operating mode for this region: Others: Reserved When MODE ≠ 11, the standard AES encryption mode is activated. When either of the MODE bits are changed, the region key and associated CRC are zeroed.'
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bit_offset: 4
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bit_size: 2
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- name: KEYCRC
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description: 'region key 8-bit CRC When KEYLOCK = 0, KEYCRC bitfield is automatically computed by hardware while loading the key of this region in this exact sequence: KEYR0 then KEYR1 then KEYR2 then finally KEYR3 (all written once). A new computation starts as soon as a new valid sequence is initiated, and KEYCRC is read as zero until a valid sequence is completed. When KEYLOCK = 1, KEYCRC remains unchanged until the next reset. CRC computation is an 8-bit checksum using the standard CRC-8-CCITT algorithm X8 + X2 + X + 1 (according the convention). Source code is available in . This field is read only. Note: CRC information is updated only after the last bit of the key has been written.'
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bit_offset: 8
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bit_size: 8
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- name: REGx_VERSION
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description: region firmware version This 16-bit bitfield must be correctly initialized before the region corresponding REG_EN bit is set in OTFDEC_RxCFGR.
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bit_offset: 16
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bit_size: 16
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fieldset/R1ENDADDR:
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description: OTFDEC region 1 end address register.
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fields:
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- name: REGx_END_ADDR
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description: 'Region AHB end address This register must be written before the region corresponding REG_EN bit in the OTFDEC_RxCFGR register is set, and OTFDEC_RxENDADDR must be strictly greater than OTFDEC_RxSTARTADDR to be valid. Writing to this register is discarded if performed while the region CONFIGLOCK bit in OTFDEC_RxCFGR is set. Note: When determining the region the first 12 bits (lsb) and the last 4 bits (msb) are ignored. When this register is accessed in read the 4 msb bits return zeros and the 12 lsb bits return ones.'
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bit_offset: 0
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bit_size: 32
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fieldset/R1KEYR0:
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description: OTFDEC region 1 key register 0.
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fields:
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- name: REGx_KEY
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description: 'Region key, bits [31:0] This register must be written before the region corresponding REG_EN bit in OTFDEC_RxCFGR is set. Reading this register returns a zero value. Writing to this register is discarded if performed while the region CONFIGLOCK or KEYLOCK bit is set in the OTFDEC_RxCFGR. Note: When application successfully changes MODE bits in OTFDEC_RxCFGR and OTFDEC_RxKEYR, and associated KEYCRC are erased.'
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bit_offset: 0
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bit_size: 32
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fieldset/R1KEYR1:
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description: OTFDEC region 1 key register 1.
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fields:
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- name: REGx_KEY
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description: Region key, bits [63:32] Refer to the OTFDEC_RxKEYR0 register for description of the KEY[127:0] bitfield.
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bit_offset: 0
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bit_size: 32
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fieldset/R1KEYR2:
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description: OTFDEC region 1 key register 2.
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fields:
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- name: REGx_KEY
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description: Region key, bits [95:64] Refer to the OTFDEC_RxKEYR0 register for description of the KEY[127:0] bitfield.
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bit_offset: 0
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bit_size: 32
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fieldset/R1KEYR3:
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description: OTFDEC region 1 key register 3.
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fields:
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- name: REGx_KEY
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description: Region key, bits [127:96] Refer to the OTFDEC_RxKEYR0 register for description of the KEY[127:0] bitfield.
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bit_offset: 0
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bit_size: 32
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fieldset/R1NONCER0:
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description: OTFDEC region 1 nonce register 0.
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fields:
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- name: REGx_NONCE
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description: Region nonce, bits [31:0] This register must be written before the region corresponding REG_EN bit in OTFDEC_RxCFGR is set. Writing is discarded in this register if performed while the region CONFIGLOCK bit in the OTFDEC_RxCFGR is set.
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bit_offset: 0
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bit_size: 32
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fieldset/R1NONCER1:
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description: OTFDEC region 1 nonce register 1.
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fields:
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- name: REGx_NONCE
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description: Region nonce, bits [63:32] Refer to the OTFDEC_RxNONCER0 register for description of the NONCE[63:0] bitfield.
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bit_offset: 0
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bit_size: 32
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fieldset/R1STARTADDR:
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description: OTFDEC region 1 start address register.
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fields:
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- name: REGx_START_ADDR
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description: 'Region AHB start address This register must be written before the region corresponding REG_EN bit in the OTFDEC_RxCFGR register is set. Writing to this register is discarded if performed while the region CONFIGLOCK bit in the OTFDEC_RxCFGR register is set. Note: When determining the region the first 12 bits (lsb) and the last 4 bits (msb) are ignored. When this register is accessed in read the 4 msb bits and the 12 lsb bits return zeros.'
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bit_offset: 0
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bit_size: 32
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fieldset/R2CFGR:
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description: OTFDEC region 2 configuration register.
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fields:
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- name: REG_EN
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description: 'region on-the-fly decryption enable Note: Garbage is decrypted if region context (version, key, nonce) is not valid when this bit is set.'
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bit_offset: 0
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bit_size: 1
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- name: CONFIGLOCK
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description: 'region config lock Note: This bit is set once. If this bit is set, it can only be reset to 0 if OTFDEC is reset. Setting this bit forces KEYLOCK bit to 1.'
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bit_offset: 1
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bit_size: 1
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- name: KEYLOCK
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description: 'region key lock Note: This bit is set once: if this bit is set, it can only be reset to 0 if the OTFDEC is reset.'
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bit_offset: 2
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bit_size: 1
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- name: MODE
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description: 'operating mode This bitfield selects the OTFDEC operating mode for this region: Others: Reserved When MODE ≠ 11, the standard AES encryption mode is activated. When either of the MODE bits are changed, the region key and associated CRC are zeroed.'
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bit_offset: 4
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bit_size: 2
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- name: KEYCRC
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description: 'region key 8-bit CRC When KEYLOCK = 0, KEYCRC bitfield is automatically computed by hardware while loading the key of this region in this exact sequence: KEYR0 then KEYR1 then KEYR2 then finally KEYR3 (all written once). A new computation starts as soon as a new valid sequence is initiated, and KEYCRC is read as zero until a valid sequence is completed. When KEYLOCK = 1, KEYCRC remains unchanged until the next reset. CRC computation is an 8-bit checksum using the standard CRC-8-CCITT algorithm X8 + X2 + X + 1 (according the convention). Source code is available in . This field is read only. Note: CRC information is updated only after the last bit of the key has been written.'
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bit_offset: 8
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bit_size: 8
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- name: REGx_VERSION
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description: region firmware version This 16-bit bitfield must be correctly initialized before the region corresponding REG_EN bit is set in OTFDEC_RxCFGR.
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bit_offset: 16
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bit_size: 16
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fieldset/R2ENDADDR:
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description: OTFDEC region 2 end address register.
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fields:
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- name: REGx_END_ADDR
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description: 'Region AHB end address This register must be written before the region corresponding REG_EN bit in the OTFDEC_RxCFGR register is set, and OTFDEC_RxENDADDR must be strictly greater than OTFDEC_RxSTARTADDR to be valid. Writing to this register is discarded if performed while the region CONFIGLOCK bit in OTFDEC_RxCFGR is set. Note: When determining the region the first 12 bits (lsb) and the last 4 bits (msb) are ignored. When this register is accessed in read the 4 msb bits return zeros and the 12 lsb bits return ones.'
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bit_offset: 0
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bit_size: 32
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fieldset/R2KEYR0:
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description: OTFDEC region 2 key register 0.
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fields:
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- name: REGx_KEY
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description: 'Region key, bits [31:0] This register must be written before the region corresponding REG_EN bit in OTFDEC_RxCFGR is set. Reading this register returns a zero value. Writing to this register is discarded if performed while the region CONFIGLOCK or KEYLOCK bit is set in the OTFDEC_RxCFGR. Note: When application successfully changes MODE bits in OTFDEC_RxCFGR and OTFDEC_RxKEYR, and associated KEYCRC are erased.'
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bit_offset: 0
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bit_size: 32
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fieldset/R2KEYR1:
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description: OTFDEC region 2 key register 1.
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fields:
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- name: REGx_KEY
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description: Region key, bits [63:32] Refer to the OTFDEC_RxKEYR0 register for description of the KEY[127:0] bitfield.
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bit_offset: 0
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bit_size: 32
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fieldset/R2KEYR2:
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description: OTFDEC region 2 key register 2.
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fields:
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- name: REGx_KEY
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description: Region key, bits [95:64] Refer to the OTFDEC_RxKEYR0 register for description of the KEY[127:0] bitfield.
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bit_offset: 0
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bit_size: 32
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fieldset/R2KEYR3:
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description: OTFDEC region 2 key register 3.
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fields:
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- name: REGx_KEY
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description: Region key, bits [127:96] Refer to the OTFDEC_RxKEYR0 register for description of the KEY[127:0] bitfield.
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bit_offset: 0
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bit_size: 32
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fieldset/R2NONCER0:
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description: OTFDEC region 2 nonce register 0.
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fields:
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- name: REGx_NONCE
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description: Region nonce, bits [31:0] This register must be written before the region corresponding REG_EN bit in OTFDEC_RxCFGR is set. Writing is discarded in this register if performed while the region CONFIGLOCK bit in the OTFDEC_RxCFGR is set.
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bit_offset: 0
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bit_size: 32
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fieldset/R2NONCER1:
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description: OTFDEC region 2 nonce register 1.
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fields:
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- name: REGx_NONCE
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description: Region nonce, bits [63:32] Refer to the OTFDEC_RxNONCER0 register for description of the NONCE[63:0] bitfield.
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bit_offset: 0
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bit_size: 32
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fieldset/R2STARTADDR:
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description: OTFDEC region 2 start address register.
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fields:
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- name: REGx_START_ADDR
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description: 'Region AHB start address This register must be written before the region corresponding REG_EN bit in the OTFDEC_RxCFGR register is set. Writing to this register is discarded if performed while the region CONFIGLOCK bit in the OTFDEC_RxCFGR register is set. Note: When determining the region the first 12 bits (lsb) and the last 4 bits (msb) are ignored. When this register is accessed in read the 4 msb bits and the 12 lsb bits return zeros.'
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bit_offset: 0
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bit_size: 32
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fieldset/R3CFGR:
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fieldset/RegionCFGR:
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description: OTFDEC region 3 configuration register.
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fields:
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- name: REG_EN
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@ -413,146 +133,7 @@ fieldset/R3CFGR:
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description: 'region key 8-bit CRC When KEYLOCK = 0, KEYCRC bitfield is automatically computed by hardware while loading the key of this region in this exact sequence: KEYR0 then KEYR1 then KEYR2 then finally KEYR3 (all written once). A new computation starts as soon as a new valid sequence is initiated, and KEYCRC is read as zero until a valid sequence is completed. When KEYLOCK = 1, KEYCRC remains unchanged until the next reset. CRC computation is an 8-bit checksum using the standard CRC-8-CCITT algorithm X8 + X2 + X + 1 (according the convention). Source code is available in . This field is read only. Note: CRC information is updated only after the last bit of the key has been written.'
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bit_offset: 8
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bit_size: 8
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- name: REGx_VERSION
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- name: REG_VERSION
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description: region firmware version This 16-bit bitfield must be correctly initialized before the region corresponding REG_EN bit is set in OTFDEC_RxCFGR.
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bit_offset: 16
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bit_size: 16
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fieldset/R3ENDADDR:
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description: OTFDEC region 3 end address register.
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fields:
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- name: REGx_END_ADDR
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description: 'Region AHB end address This register must be written before the region corresponding REG_EN bit in the OTFDEC_RxCFGR register is set, and OTFDEC_RxENDADDR must be strictly greater than OTFDEC_RxSTARTADDR to be valid. Writing to this register is discarded if performed while the region CONFIGLOCK bit in OTFDEC_RxCFGR is set. Note: When determining the region the first 12 bits (lsb) and the last 4 bits (msb) are ignored. When this register is accessed in read the 4 msb bits return zeros and the 12 lsb bits return ones.'
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||||
bit_offset: 0
|
||||
bit_size: 32
|
||||
fieldset/R3KEYR0:
|
||||
description: OTFDEC region 3 key register 0.
|
||||
fields:
|
||||
- name: REGx_KEY
|
||||
description: 'Region key, bits [31:0] This register must be written before the region corresponding REG_EN bit in OTFDEC_RxCFGR is set. Reading this register returns a zero value. Writing to this register is discarded if performed while the region CONFIGLOCK or KEYLOCK bit is set in the OTFDEC_RxCFGR. Note: When application successfully changes MODE bits in OTFDEC_RxCFGR and OTFDEC_RxKEYR, and associated KEYCRC are erased.'
|
||||
bit_offset: 0
|
||||
bit_size: 32
|
||||
fieldset/R3KEYR1:
|
||||
description: OTFDEC region 3 key register 1.
|
||||
fields:
|
||||
- name: REGx_KEY
|
||||
description: Region key, bits [63:32] Refer to the OTFDEC_RxKEYR0 register for description of the KEY[127:0] bitfield.
|
||||
bit_offset: 0
|
||||
bit_size: 32
|
||||
fieldset/R3KEYR2:
|
||||
description: OTFDEC region 3 key register 2.
|
||||
fields:
|
||||
- name: REGx_KEY
|
||||
description: Region key, bits [95:64] Refer to the OTFDEC_RxKEYR0 register for description of the KEY[127:0] bitfield.
|
||||
bit_offset: 0
|
||||
bit_size: 32
|
||||
fieldset/R3KEYR3:
|
||||
description: OTFDEC region 3 key register 3.
|
||||
fields:
|
||||
- name: REGx_KEY
|
||||
description: Region key, bits [127:96] Refer to the OTFDEC_RxKEYR0 register for description of the KEY[127:0] bitfield.
|
||||
bit_offset: 0
|
||||
bit_size: 32
|
||||
fieldset/R3NONCER0:
|
||||
description: OTFDEC region 3 nonce register 0.
|
||||
fields:
|
||||
- name: REGx_NONCE
|
||||
description: Region nonce, bits [31:0] This register must be written before the region corresponding REG_EN bit in OTFDEC_RxCFGR is set. Writing is discarded in this register if performed while the region CONFIGLOCK bit in the OTFDEC_RxCFGR is set.
|
||||
bit_offset: 0
|
||||
bit_size: 32
|
||||
fieldset/R3NONCER1:
|
||||
description: OTFDEC region 3 nonce register 1.
|
||||
fields:
|
||||
- name: REGx_NONCE
|
||||
description: Region nonce, bits [63:32] Refer to the OTFDEC_RxNONCER0 register for description of the NONCE[63:0] bitfield.
|
||||
bit_offset: 0
|
||||
bit_size: 32
|
||||
fieldset/R3STARTADDR:
|
||||
description: OTFDEC region 3 start address register.
|
||||
fields:
|
||||
- name: REGx_START_ADDR
|
||||
description: 'Region AHB start address This register must be written before the region corresponding REG_EN bit in the OTFDEC_RxCFGR register is set. Writing to this register is discarded if performed while the region CONFIGLOCK bit in the OTFDEC_RxCFGR register is set. Note: When determining the region the first 12 bits (lsb) and the last 4 bits (msb) are ignored. When this register is accessed in read the 4 msb bits and the 12 lsb bits return zeros.'
|
||||
bit_offset: 0
|
||||
bit_size: 32
|
||||
fieldset/R4CFGR:
|
||||
description: OTFDEC region 4 configuration register.
|
||||
fields:
|
||||
- name: REG_EN
|
||||
description: 'region on-the-fly decryption enable Note: Garbage is decrypted if region context (version, key, nonce) is not valid when this bit is set.'
|
||||
bit_offset: 0
|
||||
bit_size: 1
|
||||
- name: CONFIGLOCK
|
||||
description: 'region config lock Note: This bit is set once. If this bit is set, it can only be reset to 0 if OTFDEC is reset. Setting this bit forces KEYLOCK bit to 1.'
|
||||
bit_offset: 1
|
||||
bit_size: 1
|
||||
- name: KEYLOCK
|
||||
description: 'region key lock Note: This bit is set once: if this bit is set, it can only be reset to 0 if the OTFDEC is reset.'
|
||||
bit_offset: 2
|
||||
bit_size: 1
|
||||
- name: MODE
|
||||
description: 'operating mode This bitfield selects the OTFDEC operating mode for this region: Others: Reserved When MODE ≠ 11, the standard AES encryption mode is activated. When either of the MODE bits are changed, the region key and associated CRC are zeroed.'
|
||||
bit_offset: 4
|
||||
bit_size: 2
|
||||
- name: KEYCRC
|
||||
description: 'region key 8-bit CRC When KEYLOCK = 0, KEYCRC bitfield is automatically computed by hardware while loading the key of this region in this exact sequence: KEYR0 then KEYR1 then KEYR2 then finally KEYR3 (all written once). A new computation starts as soon as a new valid sequence is initiated, and KEYCRC is read as zero until a valid sequence is completed. When KEYLOCK = 1, KEYCRC remains unchanged until the next reset. CRC computation is an 8-bit checksum using the standard CRC-8-CCITT algorithm X8 + X2 + X + 1 (according the convention). Source code is available in . This field is read only. Note: CRC information is updated only after the last bit of the key has been written.'
|
||||
bit_offset: 8
|
||||
bit_size: 8
|
||||
- name: REGx_VERSION
|
||||
description: region firmware version This 16-bit bitfield must be correctly initialized before the region corresponding REG_EN bit is set in OTFDEC_RxCFGR.
|
||||
bit_offset: 16
|
||||
bit_size: 16
|
||||
fieldset/R4ENDADDR:
|
||||
description: OTFDEC region 4 end address register.
|
||||
fields:
|
||||
- name: REGx_END_ADDR
|
||||
description: 'Region AHB end address This register must be written before the region corresponding REG_EN bit in the OTFDEC_RxCFGR register is set, and OTFDEC_RxENDADDR must be strictly greater than OTFDEC_RxSTARTADDR to be valid. Writing to this register is discarded if performed while the region CONFIGLOCK bit in OTFDEC_RxCFGR is set. Note: When determining the region the first 12 bits (lsb) and the last 4 bits (msb) are ignored. When this register is accessed in read the 4 msb bits return zeros and the 12 lsb bits return ones.'
|
||||
bit_offset: 0
|
||||
bit_size: 32
|
||||
fieldset/R4KEYR0:
|
||||
description: OTFDEC region 4 key register 0.
|
||||
fields:
|
||||
- name: REGx_KEY
|
||||
description: 'Region key, bits [31:0] This register must be written before the region corresponding REG_EN bit in OTFDEC_RxCFGR is set. Reading this register returns a zero value. Writing to this register is discarded if performed while the region CONFIGLOCK or KEYLOCK bit is set in the OTFDEC_RxCFGR. Note: When application successfully changes MODE bits in OTFDEC_RxCFGR and OTFDEC_RxKEYR, and associated KEYCRC are erased.'
|
||||
bit_offset: 0
|
||||
bit_size: 32
|
||||
fieldset/R4KEYR1:
|
||||
description: OTFDEC region 4 key register 1.
|
||||
fields:
|
||||
- name: REGx_KEY
|
||||
description: Region key, bits [63:32] Refer to the OTFDEC_RxKEYR0 register for description of the KEY[127:0] bitfield.
|
||||
bit_offset: 0
|
||||
bit_size: 32
|
||||
fieldset/R4KEYR2:
|
||||
description: OTFDEC region 4 key register 2.
|
||||
fields:
|
||||
- name: REGx_KEY
|
||||
description: Region key, bits [95:64] Refer to the OTFDEC_RxKEYR0 register for description of the KEY[127:0] bitfield.
|
||||
bit_offset: 0
|
||||
bit_size: 32
|
||||
fieldset/R4KEYR3:
|
||||
description: OTFDEC region 4 key register 3.
|
||||
fields:
|
||||
- name: REGx_KEY
|
||||
description: Region key, bits [127:96] Refer to the OTFDEC_RxKEYR0 register for description of the KEY[127:0] bitfield.
|
||||
bit_offset: 0
|
||||
bit_size: 32
|
||||
fieldset/R4NONCER0:
|
||||
description: OTFDEC region 4 nonce register 0.
|
||||
fields:
|
||||
- name: REGx_NONCE
|
||||
description: Region nonce, bits [31:0] This register must be written before the region corresponding REG_EN bit in OTFDEC_RxCFGR is set. Writing is discarded in this register if performed while the region CONFIGLOCK bit in the OTFDEC_RxCFGR is set.
|
||||
bit_offset: 0
|
||||
bit_size: 32
|
||||
fieldset/R4NONCER1:
|
||||
description: OTFDEC region 4 nonce register 1.
|
||||
fields:
|
||||
- name: REGx_NONCE
|
||||
description: Region nonce, bits [63:32] Refer to the OTFDEC_RxNONCER0 register for description of the NONCE[63:0] bitfield.
|
||||
bit_offset: 0
|
||||
bit_size: 32
|
||||
fieldset/R4STARTADDR:
|
||||
description: OTFDEC region 4 start address register.
|
||||
fields:
|
||||
- name: REGx_START_ADDR
|
||||
description: 'Region AHB start address This register must be written before the region corresponding REG_EN bit in the OTFDEC_RxCFGR register is set. Writing to this register is discarded if performed while the region CONFIGLOCK bit in the OTFDEC_RxCFGR register is set. Note: When determining the region the first 12 bits (lsb) and the last 4 bits (msb) are ignored. When this register is accessed in read the 4 msb bits and the 12 lsb bits return zeros.'
|
||||
bit_offset: 0
|
||||
bit_size: 32
|
||||
|
||||
33
transforms/OTFDEC.yaml
Normal file
33
transforms/OTFDEC.yaml
Normal file
@ -0,0 +1,33 @@
|
||||
transforms:
|
||||
- !Rename
|
||||
from: ^(OTFDEC)\d$
|
||||
to: $1
|
||||
|
||||
- !DeleteFieldsets
|
||||
from: ^R\d(STARTADDR|ENDADDR|NONCER0|NONCER1|KEYR0|KEYR1|KEYR2|KEYR3)$
|
||||
|
||||
- !MergeFieldsets
|
||||
from: ^(R)\d(CFGR)$
|
||||
to: ${1}egion$2
|
||||
|
||||
- !MakeBlock
|
||||
blocks: ^OTFDEC$
|
||||
from: ^R(\d)(.+)$
|
||||
to_outer: Region${1}
|
||||
to_block: Region
|
||||
to_inner: ${2}
|
||||
|
||||
- !MakeRegisterArray
|
||||
blocks: ^Region$
|
||||
from: ^(NONCER|KEYR)\d$
|
||||
to: $1
|
||||
|
||||
- !MakeRegisterArray
|
||||
blocks: ^OTFDEC$
|
||||
from: ^(Region)\d$
|
||||
to: $1
|
||||
|
||||
- !RenameFields
|
||||
fieldset: ^RegionCFGR$
|
||||
from: (REG)x(_VERSION)
|
||||
to: $1$2
|
||||
Loading…
x
Reference in New Issue
Block a user