From b91dd597d3860391742516c9367e221b93c05731 Mon Sep 17 00:00:00 2001 From: xoviat Date: Tue, 4 Jul 2023 13:20:24 -0500 Subject: [PATCH] fdcan: arraify --- data/registers/can_fdcan.yaml | 176 ++++++++++++++-------------------- 1 file changed, 71 insertions(+), 105 deletions(-) diff --git a/data/registers/can_fdcan.yaml b/data/registers/can_fdcan.yaml index 4a7f383..cea4b80 100644 --- a/data/registers/can_fdcan.yaml +++ b/data/registers/can_fdcan.yaml @@ -90,23 +90,23 @@ block/FDCAN: byte_offset: 136 access: Read fieldset: HPMS - - name: RXF0S - description: FDCAN Rx FIFO 0 Status Register + - name: RXFS + description: FDCAN Rx FIFO X Status Register byte_offset: 144 - fieldset: RXF0S - - name: RXF0A + fieldset: RXFS + access: Read + array: + offsets: + - 0 + - 8 + - name: RXFA description: CAN Rx FIFO 0 Acknowledge Register byte_offset: 148 - fieldset: RXF0A - - name: RXF1S - description: FDCAN Rx FIFO 1 Status Register - byte_offset: 152 - access: Read - fieldset: RXF1S - - name: RXF1A - description: FDCAN Rx FIFO 1 Acknowledge Register - byte_offset: 156 - fieldset: RXF1A + fieldset: RXFA + array: + offsets: + - 0 + - 8 - name: TXBC description: FDCAN Tx Buffer Configuration Register byte_offset: 192 @@ -324,30 +324,31 @@ fieldset/HPMS: fieldset/IE: description: The settings in the Interrupt Enable register determine which status changes in the Interrupt Register will be signaled on an interrupt line. fields: - - name: RF0NE - description: Rx FIFO 0 new message enable + - name: RFNE + description: Rx FIFO X new message enable bit_offset: 0 bit_size: 1 - - name: RF0FE - description: Rx FIFO 0 full enable + array: + offsets: + - 0 + - 3 + - name: RFFE + description: Rx FIFO X full enable bit_offset: 1 bit_size: 1 - - name: RF0LE - description: Rx FIFO 0 message lost enable + array: + offsets: + - 0 + - 3 + - name: RFLE + description: Rx FIFO X message lost enable bit_offset: 2 bit_size: 1 - - name: RF1NE - description: Rx FIFO 1 new message enable - bit_offset: 3 - bit_size: 1 - - name: RF1FE - description: Rx FIFO 1 full enable - bit_offset: 4 - bit_size: 1 - - name: RF1LE - description: Rx FIFO 1 message lost enable - bit_offset: 5 - bit_size: 1 + array: + offsets: + - 0 + - 3 + - name: HPME description: High-priority message enable bit_offset: 6 @@ -434,14 +435,13 @@ fieldset/ILE: fieldset/ILS: description: "The Interrupt Line Select register assigns an interrupt generated by a specific interrupt flag from the Interrupt Register to one of the two module interrupt lines. For interrupt generation the respective interrupt line has to be enabled via ILE[EINT0] and ILE[EINT1]." fields: - - name: RXFIFO0 + - name: RXFIFO description: RX FIFO bit grouping the following interruption bit_offset: 0 bit_size: 1 - - name: RXFIFO1 - description: RX FIFO bit grouping the following interruption - bit_offset: 1 - bit_size: 1 + array: + len: 2 + stride: 1 - name: SMSG description: Status message bit grouping the following interruption bit_offset: 2 @@ -465,30 +465,30 @@ fieldset/ILS: fieldset/IR: description: The flags are set when one of the listed conditions is detected (edge-sensitive). The flags remain set until the Host clears them. A flag is cleared by writing a 1 to the corresponding bit position. Writing a 0 has no effect. A hard reset will clear the register. The configuration of IE controls whether an interrupt is generated. The configuration of ILS controls on which interrupt line an interrupt is signaled. fields: - - name: RF0N - description: Rx FIFO 0 new message + - name: RFN + description: Rx FIFO X new message bit_offset: 0 bit_size: 1 - - name: RF0F - description: Rx FIFO 0 full + array: + offsets: + - 0 + - 3 + - name: RFF + description: Rx FIFO X full bit_offset: 1 bit_size: 1 - - name: RF0L - description: Rx FIFO 0 message lost + array: + offsets: + - 0 + - 3 + - name: RFL + description: Rx FIFO X message lost bit_offset: 2 bit_size: 1 - - name: RF1N - description: Rx FIFO 1 new message - bit_offset: 3 - bit_size: 1 - - name: RF1F - description: Rx FIFO 1 full - bit_offset: 4 - bit_size: 1 - - name: RF1L - description: Rx FIFO 1 message lost - bit_offset: 5 - bit_size: 1 + array: + offsets: + - 0 + - 3 - name: HPM description: High-priority message bit_offset: 6 @@ -638,70 +638,36 @@ fieldset/RWD: description: WDV bit_offset: 8 bit_size: 8 -fieldset/RXF0A: - description: CAN Rx FIFO 0 Acknowledge Register +fieldset/RXFA: + description: CAN Rx FIFO X Acknowledge Register fields: - - name: F0AI - description: F0AI + - name: FAI + description: FAI bit_offset: 0 bit_size: 6 -fieldset/RXF0S: - description: FDCAN Rx FIFO 0 Status Register +fieldset/RXFS: + description: FDCAN Rx FIFO X Status Register fields: - - name: F0FL - description: F0FL + - name: FFL + description: FFL bit_offset: 0 bit_size: 7 - - name: F0GI - description: F0GI + - name: FGI + description: FGI bit_offset: 8 bit_size: 6 - - name: F0PI - description: F0PI + - name: FPI + description: FPI bit_offset: 16 bit_size: 6 - - name: F0F - description: F0F + - name: FF + description: FF bit_offset: 24 bit_size: 1 - - name: RF0L - description: RF0L + - name: RFL + description: RFL bit_offset: 25 bit_size: 1 -fieldset/RXF1A: - description: FDCAN Rx FIFO 1 Acknowledge Register - fields: - - name: F1AI - description: F1AI - bit_offset: 0 - bit_size: 6 -fieldset/RXF1S: - description: FDCAN Rx FIFO 1 Status Register - fields: - - name: F1FL - description: F1FL - bit_offset: 0 - bit_size: 7 - - name: F1GI - description: F1GI - bit_offset: 8 - bit_size: 6 - - name: F1PI - description: F1PI - bit_offset: 16 - bit_size: 6 - - name: F1F - description: F1F - bit_offset: 24 - bit_size: 1 - - name: RF1L - description: RF1L - bit_offset: 25 - bit_size: 1 - - name: DMS - description: DMS - bit_offset: 30 - bit_size: 2 fieldset/RXGFC: description: "Global settings for Message ID filtering. The Global Filter Configuration controls the filter path for standard and extended messages as described in Figure706: Standard Message ID filter path and Figure707: Extended Message ID filter path." fields: