Merge pull request #482 from liarokapisv/spi_v3-I2SCFGR

added I2SCFGR register to spi_v3.yaml

data/registers/spi_v3.yaml

@@ -75,6 +75,10 @@ block/SPI:
     description: Underrun Data Register
     byte_offset: 76
     fieldset: UDRDR
+  - name: I2SCFGR
+    description: I2S Configuration Register
+    byte_offset: 80
+    fieldset: I2SCFGR
 fieldset/CFG1:
   description: configuration register 1
   fields:
@@ -425,6 +429,70 @@ fieldset/UDRDR:
     description: Data at slave underrun condition
     bit_offset: 0
     bit_size: 32
+fieldset/I2SCFGR:
+  description: I2S Configuration Register
+  fields:
+  - name: MCKOE
+    description: Master clock output enable
+    bit_offset: 25
+    bit_size: 1
+  - name: ODD
+    description: Odd factor for the prescaler
+    bit_offset: 24
+    bit_size: 1
+    enum: ODD
+  - name: I2SDIV
+    description: I2S linear prescaler
+    bit_offset: 16
+    bit_size: 8
+  - name: DATFMT
+    description: Data format
+    bit_offset: 14
+    bit_size: 1
+    enum: DATFMT
+  - name: WSINV
+    description: Word select inversion
+    bit_offset: 13
+    bit_size: 1
+  - name: FIXCH
+    description: Fixed channel length in slave
+    bit_offset: 12
+    bit_size: 1
+    enum: FIXCH
+  - name: CKPOL
+    description: Serial audio clock polarity
+    bit_offset: 11
+    bit_size: 1
+    enum: CKPOL
+  - name: CHLEN
+    description: Channel length (number of bits per audio channel)
+    bit_offset: 10
+    bit_size: 1
+    enum: CHLEN
+  - name: DATLEN
+    description: Data length to be transferred
+    bit_offset: 8
+    bit_size: 2
+    enum: DATLEN
+  - name: PCMSYNC
+    description: PCM frame synchronization
+    bit_offset: 7
+    bit_size: 1
+    enum: PCMSYNC
+  - name: I2SSTD
+    description: I2S standard selection
+    bit_offset: 4
+    bit_size: 2
+    enum: I2SSTD
+  - name: I2SCFG
+    description: I2S configuration mode
+    bit_offset: 1
+    bit_size: 3
+    enum: I2SCFG
+  - name: I2SMOD
+    description: I2S mode selection
+    bit_offset: 0
+    bit_size: 1
 enum/COMM:
   bit_size: 2
   variants:
@@ -453,10 +521,10 @@ enum/CPOL:
   bit_size: 1
   variants:
   - name: IdleLow
-    description: CK to 0 when idle
+    description: SCK to 0 when idle
     value: 0
   - name: IdleHigh
-    description: CK to 1 when idle
+    description: SCK to 1 when idle
     value: 1
 enum/FTHLV:
   bit_size: 4
@@ -656,3 +724,105 @@ enum/UDRDET:
   - name: StartOfSlaveSelect
     description: Underrun is detected at begin of active SS signal
     value: 2
+enum/ODD:
+  bit_size: 1
+  variants:
+  - name: Even
+    description: Real divider value is I2SDIV*2
+    value: 0
+  - name: Odd
+    description: Real divider value is I2SDIV*2 + 1
+    value: 1
+enum/DATFMT:
+  bit_size: 1
+  variants:
+  - name: RightAligned
+    description: The data inside RXDR and TXDR are right aligned
+    value: 0
+  - name: LeftAligned
+    description: The data inside RXDR and TXDR are left aligned
+    value: 1
+enum/FIXCH:
+  bit_size: 1
+  variants:
+  - name: NotFixed
+    description: The channel length in slave mode is different from 16 or 32 bits (CHLEN not taken into account)
+    value: 0
+  - name: Fixed
+    description: The channel length in slave mode is supposed to be 16 or 32 bits (according to CHLEN)
+    value: 1
+enum/CKPOL:
+  bit_size: 1
+  variants:
+  - name: IdleLow
+    description: CK idle Level is Low. Signals are sampled on rising and changed on falling clock edges
+    value: 0
+  - name: IdleHigh
+    description: CK idle level is High. Signals are sampled on falling and changed on rising clock edges
+    value: 1
+enum/CHLEN:
+  bit_size: 1
+  variants:
+  - name: Bits16
+    description: 16 bits per channel
+    value: 0
+  - name: Bits32
+    description: 32 bits per channel
+    value: 1
+enum/DATLEN:
+  bit_size: 2
+  variants:
+  - name: Bits16
+    description: 16-bit data length
+    value: 0
+  - name: Bits24
+    description: 24-bit data length
+    value: 1
+  - name: Bits32
+    description: 32-bit data length
+    value: 2
+enum/PCMSYNC:
+  bit_size: 1
+  variants:
+  - name: Short
+    description: Short PCM frame synchronization
+    value: 0
+  - name: Long
+    description: Long PCM frame synchronization
+    value: 1
+enum/I2SSTD:
+  bit_size: 2
+  variants:
+  - name: Philips
+    description: I2S Philips standard
+    value: 0
+  - name: MSB
+    description: MSB/left justified standard
+    value: 1
+  - name: LSB
+    description: LSB/right justified standard
+    value: 2
+  - name: PCM
+    description: PCM standard
+    value: 3
+enum/I2SCFG:
+  bit_size: 3
+  variants:
+  - name: SlaveTx
+    description: Slave, transmit
+    value: 0
+  - name: SlaveRx
+    description: Slave, receive
+    value: 1
+  - name: MasterTx
+    description: Master, transmit
+    value: 2
+  - name: MasterRx
+    description: Master, receive
+    value: 3
+  - name: SlaveFullDuplex
+    description: Slave, full duplex
+    value: 4
+  - name: MasterFullDuplex
+    description: Master, full duplex
+    value: 5