Added SPI45SEL to RCC for STM32H7 devices.

RCC mux was missing the SPI45SEL selector. I had to add an extra rule to
the rcc.rs and fix the wrong SPI45SEL entries in rcc_h7ab.yaml and rcc_h7rs.yaml.
I confirmed that both default entries point to the PCLK2 instead of HCLK2.

data/registers/rcc_h7ab.yaml

@@ -4305,7 +4305,7 @@ enum/SPDIFRXSEL:
 enum/SPI45SEL:
   bit_size: 3
   variants:
-  - name: HCLK2
+  - name: PCLK2
     description: APB2 clock selected as peripheral clock
     value: 0
   - name: PLL2_Q

data/registers/rcc_h7rs.yaml

@@ -4095,7 +4095,7 @@ enum/SPI123SEL:
 enum/SPI45SEL:
   bit_size: 3
   variants:
-  - name: HCLK2
+  - name: PCLK2
     description: APB2 clock selected as peripheral clock
     value: 0
   - name: PLL2_Q

stm32-data-gen/src/rcc.rs

@@ -284,8 +284,8 @@ impl ParsedRccs {
             ("SPI1", &["SPI12", "SPI123"]),
             ("SPI2", &["SPI12", "SPI123"]),
             ("SPI3", &["SPI123"]),
-            ("SPI4", &["SPI145"]),
-            ("SPI5", &["SPI145"]),
+            ("SPI4", &["SPI145", "SPI45"]),
+            ("SPI5", &["SPI145", "SPI45"]),
             ("SAI1", &["SAI12"]),
             ("SAI2", &["SAI12", "SAI23"]),
             ("SAI3", &["SAI23"]),