add enums

data/registers/pwr_h5.yaml

@@ -80,6 +80,7 @@ fieldset/BDCR:
     description: Backup RAM retention in Standby and V_BAT modes When this bit set, the backup regulator (used to maintain the backup RAM content in Standby and V_BAT modes) is enabled. If BREN is cleared, the backup regulator is switched off. The backup RAM can still be used in. Run and Stop modes. However its content is lost in Standby and V_BAT modes. If BREN is set, the application must wait till the backup regulator ready flag (BRRDY) is set to indicate that the data written into the SRAM is maintained in Standby and V_BAT modes.
     bit_offset: 0
     bit_size: 1
+    enum: Retention
   - name: MONEN
     description: Backup domain voltage and temperature monitoring enable.
     bit_offset: 1
@@ -92,6 +93,7 @@ fieldset/BDCR:
     description: V_BAT charging resistor selection.
     bit_offset: 9
     bit_size: 1
+    enum: VBRS
 fieldset/BDSR:
   description: PWR Backup domain status register.
   fields:
@@ -140,10 +142,12 @@ fieldset/PMCR:
     description: low-power mode selection This bit defines the Deepsleep mode.
     bit_offset: 0
     bit_size: 1
+    enum: LPMS
   - name: SVOS
     description: system Stop mode voltage scaling selection These bits control the V_CORE voltage level in system Stop mode, to obtain the best trade-off between power consumption and performance.
     bit_offset: 2
     bit_size: 2
+    enum: SVOS
   - name: CSSF
     description: clear Standby and Stop flags (always read as 0) This bit is cleared to 0 by hardware.
     bit_offset: 7
@@ -152,6 +156,7 @@ fieldset/PMCR:
     description: 'Flash memory low-power mode in Stop mode This bit is used to obtain the best trade-off between low-power consumption and restart time when exiting from Stop mode. When it is set, the Flash memory enters low-power mode when the CPU domain is in Stop mode. Note: When system enters stop mode with SVOS5 enabled, Flash memory is automatically forced in low-power mode.'
     bit_offset: 9
     bit_size: 1
+    enum: PowerModeInStopMode
   - name: BOOSTE
     description: analog switch V_BOOST control This bit enables the booster to guarantee the analog switch AC performance when the V_DD supply voltage is below 2.7 V (reduction of the total harmonic distortion to have the same switch performance over the full supply voltage range) The V_DD supply voltage can be monitored through the PVD and the PLS bits.
     bit_offset: 12
@@ -164,22 +169,27 @@ fieldset/PMCR:
     description: ETHERNET RAM shut-off in Stop mode.
     bit_offset: 16
     bit_size: 1
+    enum: ShutOff
   - name: SRAM3SO
     description: AHB SRAM3 shut-off in Stop mode.
     bit_offset: 23
     bit_size: 1
+    enum: ShutOff
   - name: SRAM2_16SO
     description: AHB SRAM2 16-Kbyte shut-off in Stop mode.
     bit_offset: 24
     bit_size: 1
+    enum: ShutOff
   - name: SRAM2_48SO
     description: AHB SRAM2 48-Kbyte shut-off in Stop mode.
     bit_offset: 25
     bit_size: 1
+    enum: ShutOff
   - name: SRAM1SO
     description: AHB SRAM1 shut-off in Stop mode.
     bit_offset: 26
     bit_size: 1
+    enum: ShutOff
 fieldset/PMSR:
   description: PWR status register.
   fields:
@@ -280,6 +290,7 @@ fieldset/VMCR:
     description: programmable voltage detector (PVD) level selection These bits select the voltage threshold detected by the PVD.
     bit_offset: 1
     bit_size: 3
+    enum: PLS
   - name: AVDEN
     description: peripheral voltage monitor on V_DDA enable.
     bit_offset: 8
@@ -288,6 +299,7 @@ fieldset/VMCR:
     description: analog voltage detector (AVD) level selection These bits select the voltage threshold detected by the AVD.
     bit_offset: 9
     bit_size: 2
+    enum: ALS
 fieldset/VMSR:
   description: PWR voltage monitor status register.
   fields:
@@ -314,6 +326,7 @@ fieldset/VOSCR:
     description: 'voltage scaling selection according to performance These bits control the V_CORE voltage level and allow to obtain the best trade-off between power consumption and performance: - In bypass mode, these bits must also be set according to the external provided core voltage level and related performance. - When increasing the performance, the voltage scaling must be changed before increasing the system frequency. - When decreasing performance, the system frequency must first be decreased before changing the voltage scaling.'
     bit_offset: 4
     bit_size: 2
+    enum: VOS
 fieldset/VOSSR:
   description: PWR voltage scaling status register.
   fields:
@@ -329,6 +342,7 @@ fieldset/VOSSR:
     description: voltage output scaling currently applied to V_CORE This field provides the last VOS value.
     bit_offset: 14
     bit_size: 2
+    enum: VOS
 fieldset/WUCR:
   description: PWR wakeup configuration register.
   fields:
@@ -346,6 +360,7 @@ fieldset/WUCR:
     array:
       len: 8
       stride: 1
+    enum: WUPP
   - name: WUPPUPD
     description: wakeup pin pull configuration for WKUPx These bits define the I/O pad pull configuration used when WUPENx = 1. The associated GPIO port pull configuration must be set to the same value or to 00. The wakeup pin pull configuration is kept in Standby mode.
     bit_offset: 16
@@ -353,6 +368,7 @@ fieldset/WUCR:
     array:
       len: 8
       stride: 2
+    enum: WUPPUPD
 fieldset/WUSCR:
   description: PWR wakeup status clear register.
   fields:
@@ -373,3 +389,131 @@ fieldset/WUSR:
     array:
       len: 8
       stride: 1
+enum/ALS:
+  bit_size: 2
+  variants:
+  - name: Level0
+    description: AVD level0 (VAVD0 ~ 1.7 V)
+    value: 0
+  - name: Level1
+    description: AVD level1 (VAVD1 ~ 2.1 V)
+    value: 1
+  - name: Level2
+    description: AVD level2 (VAVD2 ~ 2.5 V)
+    value: 2
+  - name: Level3
+    description: AVD level3 (VAVD3 ~ 2.8 V)
+    value: 3
+enum/LPMS:
+  bit_size: 1
+  variants:
+  - name: Stop
+    description: Keeps Stop mode when entering DeepSleep.
+    value: 0
+  - name: Standby
+    description: Allows Standby mode when entering DeepSleep.
+    value: 1
+enum/PLS:
+  bit_size: 3
+  variants:
+  - name: Level0
+    description: PVD level0 (VPVD0 ~ 1.95 V)
+    value: 0
+  - name: Level1
+    description: PVD level1 (VPVD1 ~ 2.10 V)
+    value: 1
+  - name: Level2
+    description: PVD level2 (VPVD2 ~ 2.25 V)
+    value: 2
+  - name: Level3
+    description: PVD level3 (VPVD3 ~ 2.40 V)
+    value: 3
+  - name: Level4
+    description: PVD level4 (VPVD4 ~ 2.55 V)
+    value: 4
+  - name: Level5
+    description: PVD level5 (VPVD5 ~ 2.70 V)
+    value: 5
+  - name: Level6
+    description: PVD level6 (VPVD6 ~ 2.85 V)
+    value: 6
+  - name: PVDInPin
+    description: PVD_IN pin
+    value: 7
+enum/PowerModeInStopMode:
+  bit_size: 1
+  variants:
+  - name: Normal
+    description: Remains in normal mode when the system enters Stop mode (quick restart time).
+    value: 0
+  - name: LowPower
+    description: Enters low-power mode when the system enters Stop mode (low-power consumption).
+    value: 1
+enum/Retention:
+  bit_size: 1
+  variants:
+  - name: Lost
+    description: Content is lost.
+    value: 0
+  - name: Preserved
+    description: Content is preserved.
+    value: 1
+enum/SVOS:
+  bit_size: 2
+  variants:
+  - name: Scale5
+    description: SVOS5 scale 5
+    value: 1
+  - name: Scale4
+    description: SVOS4 scale 4
+    value: 2
+  - name: Scale3
+    description: SVOS3 scale 3 (default)
+    value: 3
+enum/ShutOff:
+  bit_size: 1
+  variants:
+  - name: Kept
+    description: Content is kept.
+    value: 0
+  - name: Lost
+    description: Content is lost.
+    value: 1
+enum/VBRS:
+  bit_size: 1
+  variants:
+  - name: R5kOhm
+    description: Charge VBAT through a 5 kΩ resistor.
+    value: 0
+  - name: R1_5kOhm
+    description: Charge VBAT through a 1.5 kΩ resistor.
+    value: 1
+enum/VOS:
+  bit_size: 2
+  variants:
+  - name: Scale3
+    value: 0
+  - name: Scale2
+    value: 1
+  - name: Scale1
+    value: 2
+  - name: Scale0
+    value: 3
+enum/WUPP:
+  bit_size: 1
+  variants:
+  - name: High
+    description: detection on high level (rising edge)
+    value: 0
+  - name: Low
+    description: detection on low level (falling edge)
+    value: 1
+enum/WUPPUPD:
+  bit_size: 2
+  variants:
+  - name: NoPullUp
+    value: 0
+  - name: PullUp
+    value: 1
+  - name: PullDown
+    value: 2